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b5ec5ce0e3
This is a reimplementation of prior versions which adds
the ability to define cpu models for contemporary processors.
The added models are likewise selected via -cpu <name>,
and are intended to displace the existing convention
of "-cpu qemu64" augmented with a series of feature flags.
A primary motivation was determination of a least common
denominator within a given processor class to simplify guest
migration. It is still possible to modify an arbitrary model
via additional feature flags however the goal here was to
make doing so unnecessary in typical usage. The other
consideration was providing models names reflective of
current processors. Both AMD and Intel have reviewed the
models in terms of balancing generality of migration vs.
excessive feature downgrade relative to released silicon.
This version of the patch replaces the prior hard wired
definitions with a configuration file approach for new
models. Existing models are thus far left as-is but may
easily be transitioned to (or may be overridden by) the
configuration file representation.
Proposed new model definitions are provided here for current
AMD and Intel processors. Each model consists of a name
used to select it on the command line (-cpu <name>), and a
model_id which corresponds to a least common denominator
commercial instance of the processor class.
A table of names/model_ids may be queried via "-cpu ?model":
:
x86 Opteron_G3 AMD Opteron 23xx (Gen 3 Class Opteron)
x86 Opteron_G2 AMD Opteron 22xx (Gen 2 Class Opteron)
x86 Opteron_G1 AMD Opteron 240 (Gen 1 Class Opteron)
x86 Nehalem Intel Core i7 9xx (Nehalem Class Core i7)
x86 Penryn Intel Core 2 Duo P9xxx (Penryn Class Core 2)
x86 Conroe Intel Celeron_4x0 (Conroe/Merom Class Core 2)
:
Also added is "-cpu ?dump" which exhaustively outputs all config
data for all defined models, and "-cpu ?cpuid" which enumerates
all qemu recognized CPUID feature flags.
The pseudo cpuid flag 'check' when added to the feature flag list
will warn when feature flags (either implicit in a cpu model or
explicit on the command line) would have otherwise been quietly
unavailable to a guest:
# qemu-system-x86_64 ... -cpu Nehalem,check
warning: host cpuid 0000_0001 lacks requested flag 'sse4.2|sse4_2' [0x00100000]
warning: host cpuid 0000_0001 lacks requested flag 'popcnt' [0x00800000]
A similar 'enforce' pseudo flag exists which in addition
to the above causes qemu to error exit if requested flags are
unavailable.
Configuration data for a cpu model resides in the target config
file which by default will be installed as:
/usr/local/etc/qemu/target-<arch>.conf
The format of this file should be self explanatory given the
definitions for the above six models and essentially mimics
the structure of the static x86_def_t x86_defs.
Encoding of cpuid flags names now allows aliases for both the
configuration file and the command line which reconciles some
Intel/AMD/Linux/Qemu naming differences.
This patch was tested relative to qemu.git.
Signed-off-by: john cooper <john.cooper@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
86 lines
2.9 KiB
Text
86 lines
2.9 KiB
Text
# x86 CPU MODELS
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[cpudef]
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name = "Conroe"
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level = "2"
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vendor = "GenuineIntel"
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family = "6"
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model = "2"
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stepping = "3"
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feature_edx = "sse2 sse fxsr mmx pat cmov pge sep apic cx8 mce pae msr tsc pse de fpu mtrr clflush mca pse36"
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feature_ecx = "sse3 ssse3"
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extfeature_edx = "fxsr mmx pat cmov pge apic cx8 mce pae msr tsc pse de fpu lm syscall nx"
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extfeature_ecx = "lahf_lm"
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xlevel = "0x8000000A"
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model_id = "Intel Celeron_4x0 (Conroe/Merom Class Core 2)"
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[cpudef]
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name = "Penryn"
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level = "2"
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vendor = "GenuineIntel"
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family = "6"
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model = "2"
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stepping = "3"
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feature_edx = "sse2 sse fxsr mmx pat cmov pge sep apic cx8 mce pae msr tsc pse de fpu mtrr clflush mca pse36"
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feature_ecx = "sse3 cx16 ssse3 sse4.1"
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extfeature_edx = "fxsr mmx pat cmov pge apic cx8 mce pae msr tsc pse de fpu lm syscall nx"
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extfeature_ecx = "lahf_lm"
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xlevel = "0x8000000A"
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model_id = "Intel Core 2 Duo P9xxx (Penryn Class Core 2)"
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[cpudef]
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name = "Nehalem"
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level = "2"
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vendor = "GenuineIntel"
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family = "6"
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model = "2"
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stepping = "3"
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feature_edx = "sse2 sse fxsr mmx pat cmov pge sep apic cx8 mce pae msr tsc pse de fpu mtrr clflush mca pse36"
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feature_ecx = "sse3 cx16 ssse3 sse4.1 sse4.2 popcnt"
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extfeature_edx = "fxsr mmx pat cmov pge apic cx8 mce pae msr tsc pse de fpu lm syscall nx"
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extfeature_ecx = "lahf_lm"
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xlevel = "0x8000000A"
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model_id = "Intel Core i7 9xx (Nehalem Class Core i7)"
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[cpudef]
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name = "Opteron_G1"
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level = "5"
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vendor = "AuthenticAMD"
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family = "15"
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model = "6"
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stepping = "1"
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feature_edx = "sse2 sse fxsr mmx pat cmov pge sep apic cx8 mce pae msr tsc pse de fpu mtrr clflush mca pse36"
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feature_ecx = "sse3"
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extfeature_edx = "fxsr mmx pat cmov pge apic cx8 mce pae msr tsc pse de fpu lm syscall nx"
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# extfeature_ecx = ""
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xlevel = "0x80000008"
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model_id = "AMD Opteron 240 (Gen 1 Class Opteron)"
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[cpudef]
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name = "Opteron_G2"
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level = "5"
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vendor = "AuthenticAMD"
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family = "15"
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model = "6"
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stepping = "1"
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feature_edx = "sse2 sse fxsr mmx pat cmov pge sep apic cx8 mce pae msr tsc pse de fpu mtrr clflush mca pse36"
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feature_ecx = "sse3 cx16"
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extfeature_edx = "fxsr mmx pat cmov pge apic cx8 mce pae msr tsc pse de fpu lm syscall nx rdtscp"
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extfeature_ecx = "svm lahf_lm"
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xlevel = "0x80000008"
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model_id = "AMD Opteron 22xx (Gen 2 Class Opteron)"
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[cpudef]
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name = "Opteron_G3"
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level = "5"
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vendor = "AuthenticAMD"
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family = "15"
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model = "6"
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stepping = "1"
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feature_edx = "sse2 sse fxsr mmx pat cmov pge sep apic cx8 mce pae msr tsc pse de fpu mtrr clflush mca pse36"
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feature_ecx = "sse3 cx16 monitor popcnt"
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extfeature_edx = "fxsr mmx pat cmov pge apic cx8 mce pae msr tsc pse de fpu lm syscall nx rdtscp"
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extfeature_ecx = "svm sse4a abm misalignsse lahf_lm"
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xlevel = "0x80000008"
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model_id = "AMD Opteron 23xx (Gen 3 Class Opteron)"
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