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Stefan Hajnoczi c4e5f9a29f target-arm queue: 
* Some of the preliminary patches for Cortex-A710 support
  * i.MX7 and i.MX6UL refactoring
  * Implement SRC device for i.MX7
  * Catch illegal-exception-return from EL3 with bad NSE/NS
  * Use 64-bit offsets for holding time_t differences in RTC devices
  * Model correct number of MPU regions for an505, an521, an524 boards
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Merge tag 'pull-target-arm-20230831' of https://git.linaro.org/people/pmaydell/qemu-arm into staging

target-arm queue:
 * Some of the preliminary patches for Cortex-A710 support
 * i.MX7 and i.MX6UL refactoring
 * Implement SRC device for i.MX7
 * Catch illegal-exception-return from EL3 with bad NSE/NS
 * Use 64-bit offsets for holding time_t differences in RTC devices
 * Model correct number of MPU regions for an505, an521, an524 boards

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# gpg: Signature made Thu 31 Aug 2023 06:43:53 EDT
# gpg:                using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE
# gpg:                issuer "peter.maydell@linaro.org"
# gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [full]
# gpg:                 aka "Peter Maydell <pmaydell@gmail.com>" [full]
# gpg:                 aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [full]
# gpg:                 aka "Peter Maydell <peter@archaic.org.uk>" [unknown]
# Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83  15CF 3C25 25ED 1436 0CDE

* tag 'pull-target-arm-20230831' of https://git.linaro.org/people/pmaydell/qemu-arm: (24 commits)
  hw/arm: Set number of MPU regions correctly for an505, an521, an524
  hw/arm/armv7m: Add mpu-ns-regions and mpu-s-regions properties
  target/arm: Do all "ARM_FEATURE_X implies Y" checks in post_init
  rtc: Use time_t for passing and returning time offsets
  hw/rtc/aspeed_rtc: Use 64-bit offset for holding time_t difference
  hw/rtc/twl92230: Use int64_t for sec_offset and alm_sec
  hw/rtc/m48t59: Use 64-bit arithmetic in set_alarm()
  target/arm: Catch illegal-exception-return from EL3 with bad NSE/NS
  Add i.MX7 SRC device implementation
  Add i.MX7 missing TZ devices and memory regions
  Refactor i.MX7 processor code
  Add i.MX6UL missing devices.
  Refactor i.MX6UL processor code
  Remove i.MX7 IOMUX GPR device from i.MX6UL
  target/arm: properly document FEAT_CRC32
  target/arm: Implement FEAT_HPDS2 as a no-op
  target/arm: Suppress FEAT_TRBE (Trace Buffer Extension)
  target/arm: Apply access checks to neoverse-v1 special registers
  target/arm: Apply access checks to neoverse-n1 special registers
  target/arm: Introduce make_ccsidr64
  ...

Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2023-08-31 08:31:03 -04:00
..
hvf sysemu/hvf: Use vaddr for hvf_arch_[insert|remove]_hw_breakpoint 2023-08-24 11:21:40 -07:00
tcg target/arm: Catch illegal-exception-return from EL3 with bad NSE/NS 2023-08-31 09:45:17 +01:00
arch_dump.c dump: Replace opaque DumpState pointer with a typed one 2022-10-06 19:30:43 +04:00
arm-powerctl.c target/arm: Wrap arm_rebuild_hflags calls with tcg_enabled 2023-02-27 13:27:04 +00:00
arm-powerctl.h target/arm/arm-powerctl: Add new arm_set_cpu_on_and_reset() 2019-02-28 11:03:04 +00:00
arm-qmp-cmds.c target/arm: Restrict 'qapi-commands-machine.h' to system emulation 2023-03-02 07:51:06 +01:00
common-semi-target.h semihosting: Split out common-semi-target.h 2022-06-28 04:35:07 +05:30
cortex-regs.c target/arm: Saturate L2CTLR_EL1 core count field rather than overflowing 2023-05-18 11:39:33 +01:00
cpregs.h target/arm: Apply access checks to neoverse-n1 special registers 2023-08-31 09:45:15 +01:00
cpu-param.h target/arm: Remove NB_MMU_MODES define 2023-03-13 06:44:37 -07:00
cpu-qom.h target/arm: Convert to 3-phase reset 2022-12-16 15:58:15 +00:00
cpu.c target/arm: Do all "ARM_FEATURE_X implies Y" checks in post_init 2023-08-31 11:05:04 +01:00
cpu.h target/arm: Allow cpu to configure GM blocksize 2023-08-31 09:45:14 +01:00
cpu64.c arm: spelling fixes 2023-07-25 17:13:53 +03:00
debug_helper.c target/arm: Special case M-profile in debug_helper.c code 2023-07-25 10:56:51 +01:00
gdbstub.c gdbstub: replace global gdb_has_xml with a function 2023-08-30 14:57:56 +01:00
gdbstub64.c target/arm: Correct AArch64.S2MinTxSZ 32-bit EL1 input size check 2023-05-12 16:01:25 +01:00
helper.c target/arm: Apply access checks to neoverse-n1 special registers 2023-08-31 09:45:15 +01:00
helper.h target/arm: Demultiplex AESE and AESMC 2023-07-08 07:30:18 +01:00
hvf_arm.h hvf: add guest debugging handlers for Apple Silicon hosts 2023-06-06 10:19:30 +01:00
hyp_gdbstub.c arm: move KVM breakpoints helpers 2023-06-06 10:19:29 +01:00
idau.h Use DECLARE_*CHECKER* macros 2020-09-09 09:27:09 -04:00
internals.h target/arm: Allow cpu to configure GM blocksize 2023-08-31 09:45:14 +01:00
Kconfig target/arm: Explain why we need to select ARM_V7M 2023-05-30 15:50:17 +01:00
kvm-consts.h target/arm: Remove KVM AArch32 CPU definitions 2023-04-20 10:21:15 +01:00
kvm-stub.c target/arm: Avoid bare abort() or assert(0) 2022-05-05 09:35:51 +01:00
kvm.c accel/kvm: Specify default IPA size for arm64 2023-08-22 17:31:02 +01:00
kvm64.c sysemu/kvm: Use vaddr for kvm_arch_[insert|remove]_hw_breakpoint 2023-08-24 11:21:35 -07:00
kvm_arm.h hw/intc/arm_gic: Un-inline GIC*/ITS class_name() helpers 2023-06-28 14:27:59 +02:00
machine.c target/arm: Wrap arm_rebuild_hflags calls with tcg_enabled 2023-02-27 13:27:04 +00:00
meson.build meson: Replace softmmu_ss -> system_ss 2023-06-20 10:01:30 +02:00
op_addsub.h
ptw.c target/arm: Pass security space rather than flag for AT instructions 2023-08-22 17:31:12 +01:00
syndrome.h target/arm: Add GPC syndrome 2023-06-23 11:15:47 +01:00
tcg-stubs.c target/arm: Move hflags code into the tcg directory 2023-02-27 13:27:04 +00:00
trace-events target/arm/helper: Implement CNTHCTL_EL2.CNT[VP]MASK 2023-08-22 17:31:13 +01:00
trace.h trace: switch position of headers to what Meson requires 2020-08-21 06:18:24 -04:00
vfp_helper.c target/arm: Use float64_to_int32_modulo for FJCVTZS 2023-07-01 08:26:54 +02:00