qemu/target
Bernhard Kaindl b1c897d587 e500,book3s: mfspr 259: Register mapped/aliased SPRG3 user read
This patch registers mfspr 259 for Book3S and e500 family cores
following this research:

mfspr 259 provides read-only mapped user access to SPRG3(SPR 275) according to:

- PowerISA 2.02, Book III (documents implementation starting with POWER4+ @ p20)
- IBM PowerPC 970MP RISC Microprocessor User's Manual v2.1, page 48
- Amit Singh: "Mac OS X Internals: A Systems Approach" on 970 and 970FX cores:
  He demonstrates mfspr 259 reading TLS data from Mac OS X on G5 on page 588
- NXP documents it in the Core Reference Manuals of: e500, e500mc and e5500
- getcpu() of the 32 & 64-bit Book3S Linux vDSOs use it to read the core number

mfspr 259 does not appear to be implemented in these cores according to:

- 74xx series: MPC7410/MPC7400 and MPC7450 RISC Microprocessor Reference Manuals
- 4xx series:  PPC440 Processor User's Manual, Revision 1.09 by AMCC
- 750 series:  IBM PowerPC 750CL RISC Microprocessor User's Manual
- e200 series: e200z4 Power Architectureâ Core Reference Manual

Implementation: gen_spr_usprg3() is called from init_proc_book3s_common()
(covers the 970 and POWER cores) and init_proc_e500() (covers the e500 family)
to register spr_read_ureg() in the same way which it already provides
the mapped SPR access for SPR_USPRG4-7 in gen_spr_usprgh() for cores
which have the same read-only mapped SPRG register access for SPRG4-7.

Verified using Linux by pinning a thread to a core and checking sched_getcpu()
using qemu-system-ppc64 -M pseries -cpu POWER8 using MTTCG on a x86_64 host.

Signed-off-by: Bernhard Kaindl <bernhard.kaindl@thalesgroup.com>
Reviewed-by: Stefan Resch <stefan.resch@thalesgroup.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2017-04-26 12:41:56 +10:00
..
alpha qemu-timer: do not include sysemu/cpus.h from util/qemu-timer.h 2017-03-14 13:28:18 +01:00
arm arm: Remove workarounds for old M-profile exception return implementation 2017-04-20 17:39:17 +01:00
cris qom/cpu: move tlb_flush to cpu_common_reset 2017-01-13 14:24:31 +00:00
hppa hppa: avoid anonymous unions in designated initializers. 2017-03-04 12:52:01 +00:00
i386 target/i386/misc_helper: wrap BQL around another IRQ generator 2017-04-10 10:14:50 +01:00
lm32 qom/cpu: move tlb_flush to cpu_common_reset 2017-01-13 14:24:31 +00:00
m68k This is the same as the v3 posted except a re-base and a few extra signoffs 2017-01-16 18:23:02 +00:00
microblaze cputlb: drop flush_global flag from tlb_flush 2017-01-13 14:24:37 +00:00
mips target/mips: fix delay slot detection in gen_msa_branch() 2017-03-20 11:19:14 +00:00
moxie qom/cpu: move tlb_flush to cpu_common_reset 2017-01-13 14:24:31 +00:00
nios2 target/nios2: take BQL around interrupt check 2017-03-14 13:26:37 +01:00
openrisc target/openrisc: Optimize for r0 being zero 2017-02-14 08:15:00 +11:00
ppc e500,book3s: mfspr 259: Register mapped/aliased SPRG3 user read 2017-04-26 12:41:56 +10:00
s390x s390x/misc_helper.c: wrap s390_virtio_hypercall in BQL 2017-04-25 13:39:43 +02:00
sh4 monitor: Fix crashes when using HMP commands without CPU 2017-02-21 18:29:01 +00:00
sparc sparc/sparc64: grab BQL before calling cpu_check_irqs 2017-03-09 10:41:38 +00:00
tilegx qom/cpu: move tlb_flush to cpu_common_reset 2017-01-13 14:24:31 +00:00
tricore qom/cpu: move tlb_flush to cpu_common_reset 2017-01-13 14:24:31 +00:00
unicore32 cputlb: drop flush_global flag from tlb_flush 2017-01-13 14:24:37 +00:00
xtensa target/xtensa fixes for 2.9: 2017-03-18 17:24:49 +00:00