qemu/target
Peter Maydell ab85156d8a target/hexagon: Convert to 3-phase reset
Convert the hexagon CPU class to use 3-phase reset, so it doesn't
need to use device_class_set_parent_reset() any more.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Edgar E. Iglesias <edgar@zeroasic.com>
Reviewed-by: Taylor Simpson <tsimpson@quicinc.com>
Message-id: 20221124115023.2437291-6-peter.maydell@linaro.org
2022-12-16 15:58:15 +00:00
..
alpha
arm target/arm: Convert to 3-phase reset 2022-12-16 15:58:15 +00:00
avr target/avr: Convert to 3-phase reset 2022-12-16 15:58:15 +00:00
cris target/cris: Convert to 3-phase reset 2022-12-16 15:58:15 +00:00
hexagon target/hexagon: Convert to 3-phase reset 2022-12-16 15:58:15 +00:00
hppa
i386 Miscellaneous patches for 2022-12-14 2022-12-15 10:13:46 +00:00
loongarch cleanup: Tweak and re-run return_directly.cocci 2022-12-14 16:19:35 +01:00
m68k
microblaze
mips cleanup: Tweak and re-run return_directly.cocci 2022-12-14 16:19:35 +01:00
nios2
openrisc
ppc target/ppc: Fix build warnings when building with 'disable-tcg' 2022-11-17 11:28:04 -03:00
riscv cleanup: Tweak and re-run return_directly.cocci 2022-12-14 16:19:35 +01:00
rx
s390x target/s390x: The MVCP and MVCS instructions are not privileged 2022-12-15 15:02:34 +01:00
sh4
sparc
tricore target/tricore: Rename csfr.def -> csfr.h.inc 2022-11-05 20:35:45 +01:00
xtensa
Kconfig
meson.build