mirror of
https://gitlab.com/qemu-project/qemu
synced 2024-11-05 20:35:44 +00:00
ebd643ebd2
This change completes commits5aa281d757
("aspeed: Introduce a spi_boot region under the SoC") and8b744a6a47
("aspeed: Add a boot_rom overlap region in the SoC spi_boot container") which introduced a spi_boot container at the SoC level to map the boot rom region as an overlap. It also fixes a Coverity report (CID 1508061) for a memory leak warning when the QEMU process exits by using an bmc_boot_rom MemoryRegion available at the machine level. Cc: Peter Delevoryas <peter@pjd.dev> Signed-off-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Joel Stanley <joel@jms.id.au> Signed-off-by: Cédric Le Goater <clg@kaod.org>
187 lines
5.7 KiB
C
187 lines
5.7 KiB
C
/*
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* Copyright (c) Meta Platforms, Inc. and affiliates. (http://www.meta.com)
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*
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* This code is licensed under the GPL version 2 or later. See the COPYING
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* file in the top-level directory.
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*/
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#include "qemu/osdep.h"
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#include "qemu/units.h"
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#include "qapi/error.h"
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#include "sysemu/sysemu.h"
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#include "sysemu/block-backend.h"
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#include "hw/boards.h"
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#include "hw/qdev-clock.h"
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#include "hw/arm/aspeed_soc.h"
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#include "hw/arm/boot.h"
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#define TYPE_FBY35 MACHINE_TYPE_NAME("fby35")
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OBJECT_DECLARE_SIMPLE_TYPE(Fby35State, FBY35);
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struct Fby35State {
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MachineState parent_obj;
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MemoryRegion bmc_memory;
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MemoryRegion bmc_dram;
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MemoryRegion bmc_boot_rom;
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MemoryRegion bic_memory;
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Clock *bic_sysclk;
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AspeedSoCState bmc;
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AspeedSoCState bic;
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bool mmio_exec;
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};
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#define FBY35_BMC_RAM_SIZE (2 * GiB)
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#define FBY35_BMC_FIRMWARE_ADDR 0x0
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static void fby35_bmc_write_boot_rom(DriveInfo *dinfo, MemoryRegion *mr,
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hwaddr offset, size_t rom_size,
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Error **errp)
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{
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BlockBackend *blk = blk_by_legacy_dinfo(dinfo);
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g_autofree void *storage = NULL;
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int64_t size;
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/*
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* The block backend size should have already been 'validated' by
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* the creation of the m25p80 object.
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*/
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size = blk_getlength(blk);
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if (size <= 0) {
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error_setg(errp, "failed to get flash size");
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return;
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}
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if (rom_size > size) {
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rom_size = size;
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}
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storage = g_malloc0(rom_size);
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if (blk_pread(blk, 0, rom_size, storage, 0) < 0) {
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error_setg(errp, "failed to read the initial flash content");
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return;
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}
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/* TODO: find a better way to install the ROM */
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memcpy(memory_region_get_ram_ptr(mr) + offset, storage, rom_size);
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}
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static void fby35_bmc_init(Fby35State *s)
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{
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object_initialize_child(OBJECT(s), "bmc", &s->bmc, "ast2600-a3");
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memory_region_init(&s->bmc_memory, OBJECT(&s->bmc), "bmc-memory",
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UINT64_MAX);
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memory_region_init_ram(&s->bmc_dram, OBJECT(&s->bmc), "bmc-dram",
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FBY35_BMC_RAM_SIZE, &error_abort);
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object_property_set_int(OBJECT(&s->bmc), "ram-size", FBY35_BMC_RAM_SIZE,
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&error_abort);
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object_property_set_link(OBJECT(&s->bmc), "memory", OBJECT(&s->bmc_memory),
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&error_abort);
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object_property_set_link(OBJECT(&s->bmc), "dram", OBJECT(&s->bmc_dram),
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&error_abort);
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object_property_set_int(OBJECT(&s->bmc), "hw-strap1", 0x000000C0,
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&error_abort);
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object_property_set_int(OBJECT(&s->bmc), "hw-strap2", 0x00000003,
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&error_abort);
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aspeed_soc_uart_set_chr(&s->bmc, ASPEED_DEV_UART5, serial_hd(0));
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qdev_realize(DEVICE(&s->bmc), NULL, &error_abort);
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aspeed_board_init_flashes(&s->bmc.fmc, "n25q00", 2, 0);
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/* Install first FMC flash content as a boot rom. */
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if (!s->mmio_exec) {
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DriveInfo *mtd0 = drive_get(IF_MTD, 0, 0);
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if (mtd0) {
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AspeedSoCState *bmc = &s->bmc;
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uint64_t rom_size = memory_region_size(&bmc->spi_boot);
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memory_region_init_rom(&s->bmc_boot_rom, NULL, "aspeed.boot_rom",
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rom_size, &error_abort);
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memory_region_add_subregion_overlap(&bmc->spi_boot_container, 0,
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&s->bmc_boot_rom, 1);
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fby35_bmc_write_boot_rom(mtd0, &s->bmc_boot_rom,
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FBY35_BMC_FIRMWARE_ADDR,
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rom_size, &error_abort);
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}
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}
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}
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static void fby35_bic_init(Fby35State *s)
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{
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s->bic_sysclk = clock_new(OBJECT(s), "SYSCLK");
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clock_set_hz(s->bic_sysclk, 200000000ULL);
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object_initialize_child(OBJECT(s), "bic", &s->bic, "ast1030-a1");
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memory_region_init(&s->bic_memory, OBJECT(&s->bic), "bic-memory",
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UINT64_MAX);
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qdev_connect_clock_in(DEVICE(&s->bic), "sysclk", s->bic_sysclk);
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object_property_set_link(OBJECT(&s->bic), "memory", OBJECT(&s->bic_memory),
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&error_abort);
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aspeed_soc_uart_set_chr(&s->bic, ASPEED_DEV_UART5, serial_hd(1));
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qdev_realize(DEVICE(&s->bic), NULL, &error_abort);
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aspeed_board_init_flashes(&s->bic.fmc, "sst25vf032b", 2, 2);
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aspeed_board_init_flashes(&s->bic.spi[0], "sst25vf032b", 2, 4);
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aspeed_board_init_flashes(&s->bic.spi[1], "sst25vf032b", 2, 6);
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}
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static void fby35_init(MachineState *machine)
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{
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Fby35State *s = FBY35(machine);
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fby35_bmc_init(s);
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fby35_bic_init(s);
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}
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static bool fby35_get_mmio_exec(Object *obj, Error **errp)
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{
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return FBY35(obj)->mmio_exec;
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}
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static void fby35_set_mmio_exec(Object *obj, bool value, Error **errp)
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{
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FBY35(obj)->mmio_exec = value;
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}
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static void fby35_instance_init(Object *obj)
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{
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FBY35(obj)->mmio_exec = false;
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}
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static void fby35_class_init(ObjectClass *oc, void *data)
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{
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MachineClass *mc = MACHINE_CLASS(oc);
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mc->desc = "Meta Platforms fby35";
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mc->init = fby35_init;
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mc->no_floppy = 1;
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mc->no_cdrom = 1;
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mc->min_cpus = mc->max_cpus = mc->default_cpus = 3;
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object_class_property_add_bool(oc, "execute-in-place",
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fby35_get_mmio_exec,
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fby35_set_mmio_exec);
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object_class_property_set_description(oc, "execute-in-place",
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"boot directly from CE0 flash device");
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}
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static const TypeInfo fby35_types[] = {
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{
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.name = MACHINE_TYPE_NAME("fby35"),
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.parent = TYPE_MACHINE,
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.class_init = fby35_class_init,
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.instance_size = sizeof(Fby35State),
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.instance_init = fby35_instance_init,
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},
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};
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DEFINE_TYPES(fby35_types);
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