mirror of
https://gitlab.com/qemu-project/qemu
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83c9f4ca79
Done with this script: cd hw for i in `find . -name '*.h' | sed 's/^..//'`; do echo '\,^#.*include.*["<]'$i'[">], s,'$i',hw/&,' done | sed -i -f - `find . -type f` This is so that paths remain valid as files are moved. Instead, files in hw/dataplane are referenced with the relative path. We know they are not going to move to include/, and they are the only include files that are in subdirectories _and_ move. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
521 lines
15 KiB
C
521 lines
15 KiB
C
/*
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* National Semiconductor LM8322/8323 GPIO keyboard & PWM chips.
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*
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* Copyright (C) 2008 Nokia Corporation
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* Written by Andrzej Zaborowski <andrew@openedhand.com>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 or
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* (at your option) version 3 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, see <http://www.gnu.org/licenses/>.
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*/
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#include "hw/hw.h"
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#include "hw/i2c.h"
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#include "qemu/timer.h"
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#include "ui/console.h"
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typedef struct {
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I2CSlave i2c;
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uint8_t i2c_dir;
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uint8_t i2c_cycle;
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uint8_t reg;
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qemu_irq nirq;
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uint16_t model;
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struct {
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qemu_irq out[2];
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int in[2][2];
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} mux;
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uint8_t config;
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uint8_t status;
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uint8_t acttime;
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uint8_t error;
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uint8_t clock;
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struct {
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uint16_t pull;
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uint16_t mask;
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uint16_t dir;
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uint16_t level;
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qemu_irq out[16];
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} gpio;
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struct {
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uint8_t dbnctime;
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uint8_t size;
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uint8_t start;
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uint8_t len;
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uint8_t fifo[16];
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} kbd;
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struct {
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uint16_t file[256];
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uint8_t faddr;
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uint8_t addr[3];
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QEMUTimer *tm[3];
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} pwm;
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} LM823KbdState;
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#define INT_KEYPAD (1 << 0)
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#define INT_ERROR (1 << 3)
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#define INT_NOINIT (1 << 4)
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#define INT_PWMEND(n) (1 << (5 + n))
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#define ERR_BADPAR (1 << 0)
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#define ERR_CMDUNK (1 << 1)
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#define ERR_KEYOVR (1 << 2)
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#define ERR_FIFOOVR (1 << 6)
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static void lm_kbd_irq_update(LM823KbdState *s)
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{
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qemu_set_irq(s->nirq, !s->status);
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}
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static void lm_kbd_gpio_update(LM823KbdState *s)
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{
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}
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static void lm_kbd_reset(LM823KbdState *s)
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{
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s->config = 0x80;
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s->status = INT_NOINIT;
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s->acttime = 125;
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s->kbd.dbnctime = 3;
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s->kbd.size = 0x33;
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s->clock = 0x08;
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lm_kbd_irq_update(s);
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lm_kbd_gpio_update(s);
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}
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static void lm_kbd_error(LM823KbdState *s, int err)
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{
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s->error |= err;
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s->status |= INT_ERROR;
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lm_kbd_irq_update(s);
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}
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static void lm_kbd_pwm_tick(LM823KbdState *s, int line)
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{
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}
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static void lm_kbd_pwm_start(LM823KbdState *s, int line)
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{
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lm_kbd_pwm_tick(s, line);
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}
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static void lm_kbd_pwm0_tick(void *opaque)
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{
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lm_kbd_pwm_tick(opaque, 0);
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}
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static void lm_kbd_pwm1_tick(void *opaque)
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{
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lm_kbd_pwm_tick(opaque, 1);
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}
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static void lm_kbd_pwm2_tick(void *opaque)
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{
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lm_kbd_pwm_tick(opaque, 2);
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}
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enum {
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LM832x_CMD_READ_ID = 0x80, /* Read chip ID. */
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LM832x_CMD_WRITE_CFG = 0x81, /* Set configuration item. */
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LM832x_CMD_READ_INT = 0x82, /* Get interrupt status. */
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LM832x_CMD_RESET = 0x83, /* Reset, same as external one */
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LM823x_CMD_WRITE_PULL_DOWN = 0x84, /* Select GPIO pull-up/down. */
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LM832x_CMD_WRITE_PORT_SEL = 0x85, /* Select GPIO in/out. */
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LM832x_CMD_WRITE_PORT_STATE = 0x86, /* Set GPIO pull-up/down. */
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LM832x_CMD_READ_PORT_SEL = 0x87, /* Get GPIO in/out. */
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LM832x_CMD_READ_PORT_STATE = 0x88, /* Get GPIO pull-up/down. */
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LM832x_CMD_READ_FIFO = 0x89, /* Read byte from FIFO. */
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LM832x_CMD_RPT_READ_FIFO = 0x8a, /* Read FIFO (no increment). */
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LM832x_CMD_SET_ACTIVE = 0x8b, /* Set active time. */
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LM832x_CMD_READ_ERROR = 0x8c, /* Get error status. */
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LM832x_CMD_READ_ROTATOR = 0x8e, /* Read rotator status. */
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LM832x_CMD_SET_DEBOUNCE = 0x8f, /* Set debouncing time. */
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LM832x_CMD_SET_KEY_SIZE = 0x90, /* Set keypad size. */
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LM832x_CMD_READ_KEY_SIZE = 0x91, /* Get keypad size. */
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LM832x_CMD_READ_CFG = 0x92, /* Get configuration item. */
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LM832x_CMD_WRITE_CLOCK = 0x93, /* Set clock config. */
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LM832x_CMD_READ_CLOCK = 0x94, /* Get clock config. */
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LM832x_CMD_PWM_WRITE = 0x95, /* Write PWM script. */
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LM832x_CMD_PWM_START = 0x96, /* Start PWM engine. */
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LM832x_CMD_PWM_STOP = 0x97, /* Stop PWM engine. */
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LM832x_GENERAL_ERROR = 0xff, /* There was one error.
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Previously was represented by -1
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This is not a command */
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};
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#define LM832x_MAX_KPX 8
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#define LM832x_MAX_KPY 12
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static uint8_t lm_kbd_read(LM823KbdState *s, int reg, int byte)
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{
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int ret;
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switch (reg) {
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case LM832x_CMD_READ_ID:
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ret = 0x0400;
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break;
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case LM832x_CMD_READ_INT:
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ret = s->status;
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if (!(s->status & INT_NOINIT)) {
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s->status = 0;
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lm_kbd_irq_update(s);
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}
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break;
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case LM832x_CMD_READ_PORT_SEL:
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ret = s->gpio.dir;
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break;
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case LM832x_CMD_READ_PORT_STATE:
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ret = s->gpio.mask;
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break;
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case LM832x_CMD_READ_FIFO:
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if (s->kbd.len <= 1)
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return 0x00;
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/* Example response from the two commands after a INT_KEYPAD
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* interrupt caused by the key 0x3c being pressed:
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* RPT_READ_FIFO: 55 bc 00 4e ff 0a 50 08 00 29 d9 08 01 c9 01
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* READ_FIFO: bc 00 00 4e ff 0a 50 08 00 29 d9 08 01 c9 01
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* RPT_READ_FIFO: bc 00 00 4e ff 0a 50 08 00 29 d9 08 01 c9 01
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*
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* 55 is the code of the key release event serviced in the previous
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* interrupt handling.
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*
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* TODO: find out whether the FIFO is advanced a single character
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* before reading every byte or the whole size of the FIFO at the
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* last LM832x_CMD_READ_FIFO. This affects LM832x_CMD_RPT_READ_FIFO
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* output in cases where there are more than one event in the FIFO.
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* Assume 0xbc and 0x3c events are in the FIFO:
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* RPT_READ_FIFO: 55 bc 3c 00 4e ff 0a 50 08 00 29 d9 08 01 c9
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* READ_FIFO: bc 3c 00 00 4e ff 0a 50 08 00 29 d9 08 01 c9
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* Does RPT_READ_FIFO now return 0xbc and 0x3c or only 0x3c?
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*/
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s->kbd.start ++;
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s->kbd.start &= sizeof(s->kbd.fifo) - 1;
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s->kbd.len --;
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return s->kbd.fifo[s->kbd.start];
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case LM832x_CMD_RPT_READ_FIFO:
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if (byte >= s->kbd.len)
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return 0x00;
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return s->kbd.fifo[(s->kbd.start + byte) & (sizeof(s->kbd.fifo) - 1)];
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case LM832x_CMD_READ_ERROR:
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return s->error;
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case LM832x_CMD_READ_ROTATOR:
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return 0;
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case LM832x_CMD_READ_KEY_SIZE:
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return s->kbd.size;
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case LM832x_CMD_READ_CFG:
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return s->config & 0xf;
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case LM832x_CMD_READ_CLOCK:
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return (s->clock & 0xfc) | 2;
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default:
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lm_kbd_error(s, ERR_CMDUNK);
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fprintf(stderr, "%s: unknown command %02x\n", __FUNCTION__, reg);
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return 0x00;
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}
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return ret >> (byte << 3);
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}
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static void lm_kbd_write(LM823KbdState *s, int reg, int byte, uint8_t value)
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{
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switch (reg) {
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case LM832x_CMD_WRITE_CFG:
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s->config = value;
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/* This must be done whenever s->mux.in is updated (never). */
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if ((s->config >> 1) & 1) /* MUX1EN */
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qemu_set_irq(s->mux.out[0], s->mux.in[0][(s->config >> 0) & 1]);
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if ((s->config >> 3) & 1) /* MUX2EN */
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qemu_set_irq(s->mux.out[0], s->mux.in[0][(s->config >> 2) & 1]);
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/* TODO: check that this is issued only following the chip reset
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* and not in the middle of operation and that it is followed by
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* the GPIO ports re-resablishing through WRITE_PORT_SEL and
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* WRITE_PORT_STATE (using a timer perhaps) and otherwise output
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* warnings. */
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s->status = 0;
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lm_kbd_irq_update(s);
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s->kbd.len = 0;
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s->kbd.start = 0;
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s->reg = LM832x_GENERAL_ERROR;
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break;
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case LM832x_CMD_RESET:
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if (value == 0xaa)
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lm_kbd_reset(s);
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else
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lm_kbd_error(s, ERR_BADPAR);
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s->reg = LM832x_GENERAL_ERROR;
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break;
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case LM823x_CMD_WRITE_PULL_DOWN:
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if (!byte)
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s->gpio.pull = value;
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else {
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s->gpio.pull |= value << 8;
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lm_kbd_gpio_update(s);
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s->reg = LM832x_GENERAL_ERROR;
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}
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break;
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case LM832x_CMD_WRITE_PORT_SEL:
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if (!byte)
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s->gpio.dir = value;
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else {
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s->gpio.dir |= value << 8;
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lm_kbd_gpio_update(s);
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s->reg = LM832x_GENERAL_ERROR;
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}
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break;
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case LM832x_CMD_WRITE_PORT_STATE:
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if (!byte)
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s->gpio.mask = value;
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else {
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s->gpio.mask |= value << 8;
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lm_kbd_gpio_update(s);
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s->reg = LM832x_GENERAL_ERROR;
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}
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break;
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case LM832x_CMD_SET_ACTIVE:
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s->acttime = value;
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s->reg = LM832x_GENERAL_ERROR;
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break;
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case LM832x_CMD_SET_DEBOUNCE:
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s->kbd.dbnctime = value;
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s->reg = LM832x_GENERAL_ERROR;
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if (!value)
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lm_kbd_error(s, ERR_BADPAR);
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break;
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case LM832x_CMD_SET_KEY_SIZE:
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s->kbd.size = value;
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s->reg = LM832x_GENERAL_ERROR;
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if (
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(value & 0xf) < 3 || (value & 0xf) > LM832x_MAX_KPY ||
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(value >> 4) < 3 || (value >> 4) > LM832x_MAX_KPX)
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lm_kbd_error(s, ERR_BADPAR);
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break;
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case LM832x_CMD_WRITE_CLOCK:
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s->clock = value;
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s->reg = LM832x_GENERAL_ERROR;
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if ((value & 3) && (value & 3) != 3) {
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lm_kbd_error(s, ERR_BADPAR);
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fprintf(stderr, "%s: invalid clock setting in RCPWM\n",
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__FUNCTION__);
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}
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/* TODO: Validate that the command is only issued once */
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break;
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case LM832x_CMD_PWM_WRITE:
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if (byte == 0) {
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if (!(value & 3) || (value >> 2) > 59) {
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lm_kbd_error(s, ERR_BADPAR);
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s->reg = LM832x_GENERAL_ERROR;
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break;
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}
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s->pwm.faddr = value;
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s->pwm.file[s->pwm.faddr] = 0;
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} else if (byte == 1) {
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s->pwm.file[s->pwm.faddr] |= value << 8;
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} else if (byte == 2) {
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s->pwm.file[s->pwm.faddr] |= value << 0;
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s->reg = LM832x_GENERAL_ERROR;
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}
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break;
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case LM832x_CMD_PWM_START:
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s->reg = LM832x_GENERAL_ERROR;
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if (!(value & 3) || (value >> 2) > 59) {
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lm_kbd_error(s, ERR_BADPAR);
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break;
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}
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s->pwm.addr[(value & 3) - 1] = value >> 2;
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lm_kbd_pwm_start(s, (value & 3) - 1);
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break;
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case LM832x_CMD_PWM_STOP:
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s->reg = LM832x_GENERAL_ERROR;
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if (!(value & 3)) {
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lm_kbd_error(s, ERR_BADPAR);
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break;
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}
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qemu_del_timer(s->pwm.tm[(value & 3) - 1]);
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break;
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case LM832x_GENERAL_ERROR:
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lm_kbd_error(s, ERR_BADPAR);
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break;
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default:
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lm_kbd_error(s, ERR_CMDUNK);
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fprintf(stderr, "%s: unknown command %02x\n", __FUNCTION__, reg);
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break;
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}
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}
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static void lm_i2c_event(I2CSlave *i2c, enum i2c_event event)
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{
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LM823KbdState *s = FROM_I2C_SLAVE(LM823KbdState, i2c);
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switch (event) {
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case I2C_START_RECV:
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case I2C_START_SEND:
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s->i2c_cycle = 0;
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s->i2c_dir = (event == I2C_START_SEND);
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break;
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default:
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break;
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}
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}
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static int lm_i2c_rx(I2CSlave *i2c)
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{
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LM823KbdState *s = FROM_I2C_SLAVE(LM823KbdState, i2c);
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return lm_kbd_read(s, s->reg, s->i2c_cycle ++);
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}
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static int lm_i2c_tx(I2CSlave *i2c, uint8_t data)
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{
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LM823KbdState *s = (LM823KbdState *) i2c;
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if (!s->i2c_cycle)
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s->reg = data;
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else
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lm_kbd_write(s, s->reg, s->i2c_cycle - 1, data);
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s->i2c_cycle ++;
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return 0;
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}
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static int lm_kbd_post_load(void *opaque, int version_id)
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{
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LM823KbdState *s = opaque;
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lm_kbd_irq_update(s);
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lm_kbd_gpio_update(s);
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return 0;
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}
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static const VMStateDescription vmstate_lm_kbd = {
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.name = "LM8323",
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.version_id = 0,
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.minimum_version_id = 0,
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.minimum_version_id_old = 0,
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.post_load = lm_kbd_post_load,
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.fields = (VMStateField []) {
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VMSTATE_I2C_SLAVE(i2c, LM823KbdState),
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VMSTATE_UINT8(i2c_dir, LM823KbdState),
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VMSTATE_UINT8(i2c_cycle, LM823KbdState),
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VMSTATE_UINT8(reg, LM823KbdState),
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VMSTATE_UINT8(config, LM823KbdState),
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VMSTATE_UINT8(status, LM823KbdState),
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VMSTATE_UINT8(acttime, LM823KbdState),
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VMSTATE_UINT8(error, LM823KbdState),
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VMSTATE_UINT8(clock, LM823KbdState),
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VMSTATE_UINT16(gpio.pull, LM823KbdState),
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VMSTATE_UINT16(gpio.mask, LM823KbdState),
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VMSTATE_UINT16(gpio.dir, LM823KbdState),
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VMSTATE_UINT16(gpio.level, LM823KbdState),
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VMSTATE_UINT8(kbd.dbnctime, LM823KbdState),
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VMSTATE_UINT8(kbd.size, LM823KbdState),
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VMSTATE_UINT8(kbd.start, LM823KbdState),
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VMSTATE_UINT8(kbd.len, LM823KbdState),
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VMSTATE_BUFFER(kbd.fifo, LM823KbdState),
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VMSTATE_UINT16_ARRAY(pwm.file, LM823KbdState, 256),
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VMSTATE_UINT8(pwm.faddr, LM823KbdState),
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VMSTATE_BUFFER(pwm.addr, LM823KbdState),
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VMSTATE_TIMER_ARRAY(pwm.tm, LM823KbdState, 3),
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VMSTATE_END_OF_LIST()
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}
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};
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static int lm8323_init(I2CSlave *i2c)
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{
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LM823KbdState *s = FROM_I2C_SLAVE(LM823KbdState, i2c);
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|
|
|
s->model = 0x8323;
|
|
s->pwm.tm[0] = qemu_new_timer_ns(vm_clock, lm_kbd_pwm0_tick, s);
|
|
s->pwm.tm[1] = qemu_new_timer_ns(vm_clock, lm_kbd_pwm1_tick, s);
|
|
s->pwm.tm[2] = qemu_new_timer_ns(vm_clock, lm_kbd_pwm2_tick, s);
|
|
qdev_init_gpio_out(&i2c->qdev, &s->nirq, 1);
|
|
|
|
lm_kbd_reset(s);
|
|
|
|
qemu_register_reset((void *) lm_kbd_reset, s);
|
|
return 0;
|
|
}
|
|
|
|
void lm832x_key_event(DeviceState *dev, int key, int state)
|
|
{
|
|
LM823KbdState *s = FROM_I2C_SLAVE(LM823KbdState, I2C_SLAVE(dev));
|
|
|
|
if ((s->status & INT_ERROR) && (s->error & ERR_FIFOOVR))
|
|
return;
|
|
|
|
if (s->kbd.len >= sizeof(s->kbd.fifo)) {
|
|
lm_kbd_error(s, ERR_FIFOOVR);
|
|
return;
|
|
}
|
|
|
|
s->kbd.fifo[(s->kbd.start + s->kbd.len ++) & (sizeof(s->kbd.fifo) - 1)] =
|
|
key | (state << 7);
|
|
|
|
/* We never set ERR_KEYOVR because we support multiple keys fine. */
|
|
s->status |= INT_KEYPAD;
|
|
lm_kbd_irq_update(s);
|
|
}
|
|
|
|
static void lm8323_class_init(ObjectClass *klass, void *data)
|
|
{
|
|
DeviceClass *dc = DEVICE_CLASS(klass);
|
|
I2CSlaveClass *k = I2C_SLAVE_CLASS(klass);
|
|
|
|
k->init = lm8323_init;
|
|
k->event = lm_i2c_event;
|
|
k->recv = lm_i2c_rx;
|
|
k->send = lm_i2c_tx;
|
|
dc->vmsd = &vmstate_lm_kbd;
|
|
}
|
|
|
|
static const TypeInfo lm8323_info = {
|
|
.name = "lm8323",
|
|
.parent = TYPE_I2C_SLAVE,
|
|
.instance_size = sizeof(LM823KbdState),
|
|
.class_init = lm8323_class_init,
|
|
};
|
|
|
|
static void lm832x_register_types(void)
|
|
{
|
|
type_register_static(&lm8323_info);
|
|
}
|
|
|
|
type_init(lm832x_register_types)
|