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LIU Zhiwei a65d51707d target/riscv: Enable xtheadsync under user mode 
According to xtheadsync[1][2] documentation, it can be used in user mode and
the behavior is same with other priviledges.

[1]:https://github.com/T-head-Semi/thead-extension-spec/blob/master/xtheadsync/sync.adoc
[2]:https://github.com/T-head-Semi/thead-extension-spec/blob/master/xtheadsync/sync_i.adoc

Signed-off-by: LIU Zhiwei <zhiwei_liu@linux.alibaba.com>
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Message-ID: <20240204055228.900-1-zhiwei_liu@linux.alibaba.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2024-02-09 20:43:14 +10:00
..
alpha target/alpha: Use TCG_COND_TSTNE for gen_fold_mzero 2024-02-03 23:43:50 +00:00
arm tests/tcg: Fix multiarch/gdbstub/prot-none.py 2024-02-03 13:31:45 +00:00
avr include/exec: Implement cpu_mmu_index generically 2024-02-03 16:46:10 +10:00
cris include/exec: Change cpu_mmu_index argument to CPUState 2024-02-03 16:46:10 +10:00
hexagon include/exec: Implement cpu_mmu_index generically 2024-02-03 16:46:10 +10:00
hppa include/exec: Change cpu_mmu_index argument to CPUState 2024-02-03 16:46:10 +10:00
i386 include/exec: Change cpu_mmu_index argument to CPUState 2024-02-03 16:46:10 +10:00
loongarch include/exec: Change cpu_mmu_index argument to CPUState 2024-02-03 16:46:10 +10:00
m68k target/m68k: Use TCG_COND_TST{EQ,NE} in gen_fcc_cond 2024-02-03 23:43:50 +00:00
microblaze include/exec: Change cpu_mmu_index argument to CPUState 2024-02-03 16:46:10 +10:00
mips include/exec: Implement cpu_mmu_index generically 2024-02-03 16:46:10 +10:00
nios2 include/exec: Change cpu_mmu_index argument to CPUState 2024-02-03 16:46:10 +10:00
openrisc include/exec: Change cpu_mmu_index argument to CPUState 2024-02-03 16:46:10 +10:00
ppc target/ppc/cpu-models: Rename power5+ and power7+ for new QOM naming rules 2024-02-05 14:21:21 +01:00
riscv target/riscv: Enable xtheadsync under user mode 2024-02-09 20:43:14 +10:00
rx include/exec: Implement cpu_mmu_index generically 2024-02-03 16:46:10 +10:00
s390x tcg: Introduce TCG_COND_TST{EQ,NE} 2024-02-08 16:08:42 +00:00
sh4 include/exec: Implement cpu_mmu_index generically 2024-02-03 16:46:10 +10:00
sparc target/sparc: Use TCG_COND_TSTEQ in gen_op_mulscc 2024-02-03 23:43:50 +00:00
tricore include/exec: Change cpu_mmu_index argument to CPUState 2024-02-03 16:46:10 +10:00
xtensa include/exec: Change cpu_mmu_index argument to CPUState 2024-02-03 16:46:10 +10:00
Kconfig hw/loongarch: Add support loongson3 virt machine type. 2022-06-06 18:09:03 +00:00
meson.build target: Make qemu_target_page_mask() available for *-user 2024-01-29 21:04:10 +10:00
target-common.c target: Make qemu_target_page_mask() available for *-user 2024-01-29 21:04:10 +10:00