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fa71b4f84f
This is the value that is supported by both PA-8500 and Astro. If we support a larger address space than expected, we trip up software that did not fill in all of the page table bits, expecting them to be ignored. Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
25 lines
581 B
C
25 lines
581 B
C
/*
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* PA-RISC cpu parameters for qemu.
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*
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* Copyright (c) 2016 Richard Henderson <rth@twiddle.net>
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* SPDX-License-Identifier: LGPL-2.0+
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*/
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#ifndef HPPA_CPU_PARAM_H
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#define HPPA_CPU_PARAM_H
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#define TARGET_LONG_BITS 64
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#if defined(CONFIG_USER_ONLY) && defined(TARGET_ABI32)
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# define TARGET_PHYS_ADDR_SPACE_BITS 32
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# define TARGET_VIRT_ADDR_SPACE_BITS 32
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#else
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/* ??? PA-8000 through 8600 have 40 bits; PA-8700 and 8900 have 44 bits. */
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# define TARGET_PHYS_ADDR_SPACE_BITS 40
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# define TARGET_VIRT_ADDR_SPACE_BITS 64
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#endif
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#define TARGET_PAGE_BITS 12
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#endif
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