mirror of
https://gitlab.com/qemu-project/qemu
synced 2024-09-06 09:55:55 +00:00
![Alexander Graf](/assets/img/avatar_default.png)
Recent dtc doesn't compile our dts anymore. Change all hex numbers to have 0x prefixes, indicate the old version and recompile using recent dtc. This doesn't change any semantics in the device tree. Signed-off-by: Alexander Graf <agraf@suse.de>
201 lines
4.5 KiB
Plaintext
201 lines
4.5 KiB
Plaintext
/*
|
|
* Device Tree Source for AMCC Bamboo
|
|
*
|
|
* Copyright (c) 2006, 2007 IBM Corp.
|
|
* Josh Boyer <jwboyer@linux.vnet.ibm.com>
|
|
*
|
|
* This file is licensed under the terms of the GNU General Public
|
|
* License version 2. This program is licensed "as is" without
|
|
* any warranty of any kind, whether express or implied.
|
|
*/
|
|
|
|
/dts-v1/;
|
|
|
|
/ {
|
|
#address-cells = <2>;
|
|
#size-cells = <1>;
|
|
model = "amcc,bamboo";
|
|
compatible = "amcc,bamboo";
|
|
dcr-parent = <&{/cpus/cpu@0}>;
|
|
|
|
aliases {
|
|
serial0 = &UART0;
|
|
serial1 = &UART1;
|
|
};
|
|
|
|
cpus {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
cpu@0 {
|
|
device_type = "cpu";
|
|
model = "PowerPC,440EP";
|
|
reg = <0>;
|
|
clock-frequency = <0x1fca0550>;
|
|
timebase-frequency = <0x017d7840>;
|
|
i-cache-line-size = <0x20>;
|
|
d-cache-line-size = <0x20>;
|
|
i-cache-size = <0x8000>;
|
|
d-cache-size = <0x8000>;
|
|
dcr-controller;
|
|
dcr-access-method = "native";
|
|
};
|
|
};
|
|
|
|
memory {
|
|
device_type = "memory";
|
|
reg = <0x0 0x0 0x9000000>;
|
|
};
|
|
|
|
UIC0: interrupt-controller0 {
|
|
compatible = "ibm,uic-440ep","ibm,uic";
|
|
interrupt-controller;
|
|
cell-index = <0x0>;
|
|
dcr-reg = <0x0c0 0x009>;
|
|
#address-cells = <0x0>;
|
|
#size-cells = <0x0>;
|
|
#interrupt-cells = <0x2>;
|
|
};
|
|
|
|
SDR0: sdr {
|
|
compatible = "ibm,sdr-440ep";
|
|
dcr-reg = <0x00e 0x002>;
|
|
};
|
|
|
|
CPR0: cpr {
|
|
compatible = "ibm,cpr-440ep";
|
|
dcr-reg = <0x00c 0x002>;
|
|
};
|
|
|
|
plb {
|
|
compatible = "ibm,plb-440ep", "ibm,plb-440gp", "ibm,plb4";
|
|
#address-cells = <2>;
|
|
#size-cells = <1>;
|
|
ranges;
|
|
clock-frequency = <0x07f28154>;
|
|
|
|
SDRAM0: sdram {
|
|
compatible = "ibm,sdram-440ep", "ibm,sdram-405gp";
|
|
dcr-reg = <0x010 0x2>;
|
|
};
|
|
|
|
DMA0: dma {
|
|
compatible = "ibm,dma-440ep", "ibm,dma-440gp";
|
|
dcr-reg = <0x100 0x027>;
|
|
};
|
|
|
|
POB0: opb {
|
|
compatible = "ibm,opb-440ep", "ibm,opb-440gp", "ibm,opb";
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
/* Bamboo is oddball in the 44x world and doesn't use the ERPN
|
|
* bits.
|
|
*/
|
|
ranges = <0x00000000 0x0 0x00000000 0x80000000
|
|
0x80000000 0x0 0x80000000 0x80000000>;
|
|
/* interrupt-parent = <&UIC1>; */
|
|
interrupts = <7 4>;
|
|
clock-frequency = <0x03f940aa>;
|
|
|
|
EBC0: ebc {
|
|
compatible = "ibm,ebc-440ep", "ibm,ebc-440gp", "ibm,ebc";
|
|
dcr-reg = <0x012 2>;
|
|
#address-cells = <2>;
|
|
#size-cells = <1>;
|
|
clock-frequency = <0x03f940aa>;
|
|
interrupts = <5 1>;
|
|
/* interrupt-parent = <&UIC1>; */
|
|
};
|
|
|
|
UART0: serial@ef600300 {
|
|
device_type = "serial";
|
|
compatible = "ns16550";
|
|
reg = <0xef600300 8>;
|
|
virtual-reg = <0xef600300>;
|
|
clock-frequency = <0x00a8c000>;
|
|
current-speed = <0x1c200>;
|
|
interrupt-parent = <&UIC0>;
|
|
interrupts = <0 4>;
|
|
};
|
|
|
|
UART1: serial@ef600400 {
|
|
device_type = "serial";
|
|
compatible = "ns16550";
|
|
reg = <0xef600400 8>;
|
|
virtual-reg = <0xef600400>;
|
|
clock-frequency = <0x00a8c000>;
|
|
current-speed = <0>;
|
|
interrupt-parent = <&UIC0>;
|
|
interrupts = <1 4>;
|
|
};
|
|
|
|
IIC0: i2c@ef600700 {
|
|
device_type = "i2c";
|
|
compatible = "ibm,iic-440ep", "ibm,iic-440gp", "ibm,iic";
|
|
reg = <0xef600700 0x14>;
|
|
interrupt-parent = <&UIC0>;
|
|
interrupts = <2 4>;
|
|
};
|
|
|
|
IIC1: i2c@ef600800 {
|
|
device_type = "i2c";
|
|
compatible = "ibm,iic-440ep", "ibm,iic-440gp", "ibm,iic";
|
|
reg = <0xef600800 14>;
|
|
interrupt-parent = <&UIC0>;
|
|
interrupts = <7 4>;
|
|
};
|
|
|
|
ZMII0: emac-zmii@ef600d00 {
|
|
device_type = "zmii-interface";
|
|
compatible = "ibm,zmii-440ep", "ibm,zmii-440gp", "ibm,zmii";
|
|
reg = <0xef600d00 0xc>;
|
|
};
|
|
|
|
};
|
|
|
|
PCI0: pci@ec000000 {
|
|
device_type = "pci";
|
|
#interrupt-cells = <1>;
|
|
#size-cells = <2>;
|
|
#address-cells = <3>;
|
|
compatible = "ibm,plb440ep-pci", "ibm,plb-pci";
|
|
primary;
|
|
reg = <0 0xeec00000 8 /* Config space access */
|
|
0 0xeed00000 4 /* IACK */
|
|
0 0xeed00000 4 /* Special cycle */
|
|
0 0xef400000 0x40>; /* Internal registers */
|
|
|
|
/* Outbound ranges, one memory and one IO,
|
|
* later cannot be changed. Chip supports a second
|
|
* IO range but we don't use it for now
|
|
*/
|
|
ranges = <0x02000000 0 0xa0000000 0 0xa0000000 0 0x20000000
|
|
0x01000000 0 0x00000000 0 0xe8000000 0 0x00010000>;
|
|
|
|
/* Inbound 2GB range starting at 0 */
|
|
dma-ranges = <0x42000000 0 0 0 0 0 0x80000000>;
|
|
|
|
/* Bamboo has all 4 IRQ pins tied together per slot */
|
|
interrupt-map-mask = <0xf800 0 0 0>;
|
|
interrupt-map = <
|
|
/* IDSEL 1 */
|
|
0x0800 0 0 0 &UIC0 0x1c 8
|
|
|
|
/* IDSEL 2 */
|
|
0x1000 0 0 0 &UIC0 0x1b 8
|
|
|
|
/* IDSEL 3 */
|
|
0x1800 0 0 0 &UIC0 0x1a 8
|
|
|
|
/* IDSEL 4 */
|
|
0x2000 0 0 0 &UIC0 0x19 8
|
|
>;
|
|
};
|
|
|
|
};
|
|
|
|
chosen {
|
|
linux,stdout-path = "/plb/opb/serial@ef600300";
|
|
};
|
|
};
|