qemu/tcg/loongarch64/tcg-target-reg-bits.h
Richard Henderson d46259c037 tcg: Split out tcg-target-reg-bits.h
Often, the only thing we need to know about the TCG host
is the register size.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-06-05 12:04:28 -07:00

22 lines
516 B
C

/* SPDX-License-Identifier: MIT */
/*
* Define target-specific register size
* Copyright (c) 2021 WANG Xuerui <git@xen0n.name>
*/
#ifndef TCG_TARGET_REG_BITS_H
#define TCG_TARGET_REG_BITS_H
/*
* Loongson removed the (incomplete) 32-bit support from kernel and toolchain
* for the initial upstreaming of this architecture, so don't bother and just
* support the LP64* ABI for now.
*/
#if defined(__loongarch64)
# define TCG_TARGET_REG_BITS 64
#else
# error unsupported LoongArch register size
#endif
#endif