qemu/hw/mem
Jonathan Cameron 5fcc499ee3 mem/cxl_type3: Add read and write functions for associated hostmem.
Once a read or write reaches a CXL type 3 device, the HDM decoders
on the device are used to establish the Device Physical Address
which should be accessed.  These functions peform the required maths
and then use a device specific address space to access the
hostmem->mr to fullfil the actual operation.  Note that failed writes
are silent, but failed reads return poison.  Note this is based
loosely on:

https://lore.kernel.org/qemu-devel/20200817161853.593247-6-f4bug@amsat.org/
[RFC PATCH 0/9] hw/misc: Add support for interleaved memory accesses

Only lightly tested so far.  More complex test cases yet to be written.

Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Message-Id: <20220429144110.25167-33-Jonathan.Cameron@huawei.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2022-05-13 07:57:26 -04:00
..
cxl_type3.c mem/cxl_type3: Add read and write functions for associated hostmem. 2022-05-13 07:57:26 -04:00
Kconfig hw/cxl/device: Add a memory device (8.2.8.5) 2022-05-13 06:13:36 -04:00
memory-device.c qapi: More complex uses of QAPI_LIST_APPEND 2021-01-28 08:08:45 +01:00
meson.build hw/cxl/device: Add a memory device (8.2.8.5) 2022-05-13 06:13:36 -04:00
npcm7xx_mc.c hw/*: Use type casting for SysBusDevice in NPCM7XX 2021-01-12 21:19:02 +00:00
nvdimm.c Mark remaining global TypeInfo instances as const 2022-02-21 13:30:20 +00:00
pc-dimm.c Mark remaining global TypeInfo instances as const 2022-02-21 13:30:20 +00:00
sparse-mem.c Do not include exec/address-spaces.h if it's not really necessary 2021-05-02 17:24:51 +02:00
trace-events docs: fix references to docs/devel/tracing.rst 2021-06-02 06:51:09 +02:00
trace.h trace: switch position of headers to what Meson requires 2020-08-21 06:18:24 -04:00