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Peter Maydell 82de978a8b target/xtensa updates: 
- make mini-bootloader independent of the initial CPU state;
 - add noMMU XTFPGA variants;
 - add two noMMU cores: de212 and sample_controller;
 - fix issues reported by coverity against xtensa translator and disassembler.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJaZkLBAAoJEFH5zJH4P6BE6mIQAJT1hjEhfgm3xiGfVJZYGo34
 Eo/KeyKC7QOUbr0R+E+J3h2yxSXWYbweoAZvFXkH5V4w/fhdvrCXZPVvDW0QjYY/
 wG0h+YfV/8cgVxq8AiaPHie//bLhKvJKpqH4A0HnCE4pBcslKwjOtFcG20RfOgk8
 PeQSa15QsyhOtTgdlg8rdRDECL6Lm8mXTWtOdxx8HQsl73REmNgkOZzQDSK6D5gM
 EcAJQTCcPNoDKblJKae/msSG/Vbv3PxECGaj6B72pKDSUW5Z/OqzxXDnwWXQyOgu
 q1WoPwL5U0u7uH5JE5wdD0EqwypQAbMAuzFTsove5pQlaCWdxDJzK+74NFOh6BcL
 JmLZbA4UIlA19KXiZdNKRbeH5O1U1E9xBe0wxLsqVagrwkBfpRAhI3MG1qZE1Id3
 3O6qsk26ATBGmJgTb80Wk1lPKZgKzdgcCJpzj+nz7slXp4uIQ6R3rU+6huONsGNJ
 bvz+25RAMzbFLd1l0sDsEegxmQ2BqC2Y8JqO5EKgKtT72Aooax3X6pWc8GCPuwxd
 1MCoi/ZfDcYQXNS++A3hpiKI6+qrn2t51TuyB2aUnHXtFrhlBDN1W+d+tcxl23gr
 pHIaOKbZ0nL1TmUOklAZicFMoxbDz1uebqetNS3OIYkpmuf7hMrAnKkbXUeqq9qo
 gy8+yJrXbEWPHeWZ4MtX
 =qf0K
 -----END PGP SIGNATURE-----

Merge remote-tracking branch 'remotes/xtensa/tags/20180122-xtensa' into staging

target/xtensa updates:

- make mini-bootloader independent of the initial CPU state;
- add noMMU XTFPGA variants;
- add two noMMU cores: de212 and sample_controller;
- fix issues reported by coverity against xtensa translator and disassembler.

# gpg: Signature made Mon 22 Jan 2018 20:00:01 GMT
# gpg:                using RSA key 0x51F9CC91F83FA044
# gpg: Good signature from "Max Filippov <filippov@cadence.com>"
# gpg:                 aka "Max Filippov <max.filippov@cogentembedded.com>"
# gpg:                 aka "Max Filippov <jcmvbkbc@gmail.com>"
# Primary key fingerprint: 2B67 854B 98E5 327D CDEB  17D8 51F9 CC91 F83F A044

* remotes/xtensa/tags/20180122-xtensa:
  target/xtensa: disas/xtensa: fix coverity warnings
  target/xtensa: add sample_controller core
  target/xtensa: allow different default CPU for MMU/noMMU
  target/xtensa: add de212 core
  hw/xtensa/xtfpga: support noMMU cores
  hw/xtensa/xtfpga: extract flash configuration
  hw/xtensa: extract xtensa_create_memory_regions
  target/xtensa: fix default sysrom/sysram addresses
  hw/xtensa/xtfpga: clean up function/structure names
  hw/xtensa/xtfpga: rewrite mini bootloader

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-01-24 16:59:36 +00:00
..
core-dc232b target/xtensa: switch dc232b to libisa 2017-12-18 21:26:19 -08:00
core-dc233c target/xtensa: switch dc233c to libisa 2017-12-18 21:26:19 -08:00
core-de212 target/xtensa: add de212 core 2018-01-11 12:45:27 -08:00
core-fsf target/xtensa: switch fsf to libisa 2017-12-18 21:26:19 -08:00
core-sample_controller target/xtensa: add sample_controller core 2018-01-22 11:54:58 -08:00
core-dc232b.c target/xtensa: switch dc232b to libisa 2017-12-18 21:26:19 -08:00
core-dc233c.c target/xtensa: switch dc233c to libisa 2017-12-18 21:26:19 -08:00
core-de212.c target/xtensa: add de212 core 2018-01-11 12:45:27 -08:00
core-fsf.c target/xtensa: switch fsf to libisa 2017-12-18 21:26:19 -08:00
core-sample_controller.c target/xtensa: add sample_controller core 2018-01-22 11:54:58 -08:00
cpu-qom.h
cpu.c target/xtensa: implement disassembler 2018-01-09 09:55:39 -08:00
cpu.h target/xtensa: allow different default CPU for MMU/noMMU 2018-01-22 11:54:23 -08:00
gdbstub.c target/xtensa: gdbstub: drop dead return statement 2017-07-11 11:18:37 +03:00
helper.c target/xtensa: use libisa for instruction decoding 2018-01-09 09:55:38 -08:00
helper.h
import_core.sh target/xtensa: update import_core.sh script for libisa 2017-12-18 21:26:19 -08:00
Makefile.objs target/xtensa: add sample_controller core 2018-01-22 11:54:58 -08:00
monitor.c
op_helper.c target/xtensa: pass actual frame size to the entry helper 2017-12-18 21:26:18 -08:00
overlay_tool.h target/xtensa: fix default sysrom/sysram addresses 2018-01-11 09:31:26 -08:00
translate.c target/xtensa updates: 2018-01-24 16:59:36 +00:00
xtensa-isa-internal.h target/xtensa: import libisa source 2017-12-18 21:26:19 -08:00
xtensa-isa.c target/xtensa: import libisa source 2017-12-18 21:26:19 -08:00
xtensa-isa.h target/xtensa: import libisa source 2017-12-18 21:26:19 -08:00
xtensa-semi.c char: add backend hotswap handler 2017-07-14 11:04:33 +02:00