qemu/hw/misc/arm_integrator_debug.c
Eduardo Habkost 8063396bf3 Use OBJECT_DECLARE_SIMPLE_TYPE when possible
This converts existing DECLARE_INSTANCE_CHECKER usage to
OBJECT_DECLARE_SIMPLE_TYPE when possible.

$ ./scripts/codeconverter/converter.py -i \
  --pattern=AddObjectDeclareSimpleType $(git grep -l '' -- '*.[ch]')

Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
Acked-by: Paul Durrant <paul@xen.org>
Message-Id: <20200916182519.415636-6-ehabkost@redhat.com>
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2020-09-18 14:12:32 -04:00

101 lines
2.9 KiB
C

/*
* LED, Switch and Debug control registers for ARM Integrator Boards
*
* This is currently a stub for this functionality but at least
* ensures something other than unassigned_mem_read() handles access
* to this area.
*
* The real h/w is described at:
* http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dui0159b/Babbfijf.html
*
* Copyright (c) 2013 Alex Bennée <alex@bennee.com>
*
* This work is licensed under the terms of the GNU GPL, version 2 or later.
* See the COPYING file in the top-level directory.
*/
#include "qemu/osdep.h"
#include "hw/sysbus.h"
#include "hw/misc/arm_integrator_debug.h"
#include "qemu/log.h"
#include "qemu/module.h"
#include "qom/object.h"
OBJECT_DECLARE_SIMPLE_TYPE(IntegratorDebugState, INTEGRATOR_DEBUG)
struct IntegratorDebugState {
SysBusDevice parent_obj;
MemoryRegion iomem;
};
static uint64_t intdbg_control_read(void *opaque, hwaddr offset,
unsigned size)
{
switch (offset >> 2) {
case 0: /* ALPHA */
case 1: /* LEDS */
case 2: /* SWITCHES */
qemu_log_mask(LOG_UNIMP,
"%s: returning zero from %" HWADDR_PRIx ":%u\n",
__func__, offset, size);
return 0;
default:
qemu_log_mask(LOG_GUEST_ERROR,
"%s: Bad offset %" HWADDR_PRIx,
__func__, offset);
return 0;
}
}
static void intdbg_control_write(void *opaque, hwaddr offset,
uint64_t value, unsigned size)
{
switch (offset >> 2) {
case 1: /* ALPHA */
case 2: /* LEDS */
case 3: /* SWITCHES */
/* Nothing interesting implemented yet. */
qemu_log_mask(LOG_UNIMP,
"%s: ignoring write of %" PRIu64
" to %" HWADDR_PRIx ":%u\n",
__func__, value, offset, size);
break;
default:
qemu_log_mask(LOG_GUEST_ERROR,
"%s: write of %" PRIu64
" to bad offset %" HWADDR_PRIx "\n",
__func__, value, offset);
}
}
static const MemoryRegionOps intdbg_control_ops = {
.read = intdbg_control_read,
.write = intdbg_control_write,
.endianness = DEVICE_NATIVE_ENDIAN,
};
static void intdbg_control_init(Object *obj)
{
SysBusDevice *sd = SYS_BUS_DEVICE(obj);
IntegratorDebugState *s = INTEGRATOR_DEBUG(obj);
memory_region_init_io(&s->iomem, obj, &intdbg_control_ops,
NULL, "dbg-leds", 0x1000000);
sysbus_init_mmio(sd, &s->iomem);
}
static const TypeInfo intdbg_info = {
.name = TYPE_INTEGRATOR_DEBUG,
.parent = TYPE_SYS_BUS_DEVICE,
.instance_size = sizeof(IntegratorDebugState),
.instance_init = intdbg_control_init,
};
static void intdbg_register_types(void)
{
type_register_static(&intdbg_info);
}
type_init(intdbg_register_types)