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https://gitlab.com/qemu-project/qemu
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![Avi Kivity](/assets/img/avatar_default.png)
target_phys_addr_t is unwieldly, violates the C standard (_t suffixes are reserved) and its purpose doesn't match the name (most target_phys_addr_t addresses are not target specific). Replace it with a finger-friendly, standards conformant hwaddr. Outstanding patchsets can be fixed up with the command git rebase -i --exec 'find -name "*.[ch]" | xargs s/target_phys_addr_t/hwaddr/g' origin Signed-off-by: Avi Kivity <avi@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
435 lines
11 KiB
C
435 lines
11 KiB
C
/*
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* DMA helper functions
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*
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* Copyright (c) 2009 Red Hat
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*
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* This work is licensed under the terms of the GNU General Public License
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* (GNU GPL), version 2 or later.
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*/
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#include "dma.h"
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#include "trace.h"
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#include "range.h"
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#include "qemu-thread.h"
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/* #define DEBUG_IOMMU */
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static void do_dma_memory_set(AddressSpace *as,
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dma_addr_t addr, uint8_t c, dma_addr_t len)
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{
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#define FILLBUF_SIZE 512
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uint8_t fillbuf[FILLBUF_SIZE];
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int l;
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memset(fillbuf, c, FILLBUF_SIZE);
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while (len > 0) {
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l = len < FILLBUF_SIZE ? len : FILLBUF_SIZE;
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address_space_rw(as, addr, fillbuf, l, true);
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len -= l;
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addr += l;
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}
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}
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int dma_memory_set(DMAContext *dma, dma_addr_t addr, uint8_t c, dma_addr_t len)
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{
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dma_barrier(dma, DMA_DIRECTION_FROM_DEVICE);
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if (dma_has_iommu(dma)) {
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return iommu_dma_memory_set(dma, addr, c, len);
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}
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do_dma_memory_set(dma->as, addr, c, len);
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return 0;
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}
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void qemu_sglist_init(QEMUSGList *qsg, int alloc_hint, DMAContext *dma)
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{
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qsg->sg = g_malloc(alloc_hint * sizeof(ScatterGatherEntry));
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qsg->nsg = 0;
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qsg->nalloc = alloc_hint;
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qsg->size = 0;
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qsg->dma = dma;
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}
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void qemu_sglist_add(QEMUSGList *qsg, dma_addr_t base, dma_addr_t len)
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{
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if (qsg->nsg == qsg->nalloc) {
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qsg->nalloc = 2 * qsg->nalloc + 1;
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qsg->sg = g_realloc(qsg->sg, qsg->nalloc * sizeof(ScatterGatherEntry));
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}
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qsg->sg[qsg->nsg].base = base;
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qsg->sg[qsg->nsg].len = len;
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qsg->size += len;
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++qsg->nsg;
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}
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void qemu_sglist_destroy(QEMUSGList *qsg)
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{
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g_free(qsg->sg);
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memset(qsg, 0, sizeof(*qsg));
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}
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typedef struct {
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BlockDriverAIOCB common;
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BlockDriverState *bs;
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BlockDriverAIOCB *acb;
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QEMUSGList *sg;
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uint64_t sector_num;
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DMADirection dir;
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bool in_cancel;
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int sg_cur_index;
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dma_addr_t sg_cur_byte;
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QEMUIOVector iov;
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QEMUBH *bh;
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DMAIOFunc *io_func;
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} DMAAIOCB;
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static void dma_bdrv_cb(void *opaque, int ret);
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static void reschedule_dma(void *opaque)
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{
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DMAAIOCB *dbs = (DMAAIOCB *)opaque;
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qemu_bh_delete(dbs->bh);
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dbs->bh = NULL;
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dma_bdrv_cb(dbs, 0);
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}
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static void continue_after_map_failure(void *opaque)
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{
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DMAAIOCB *dbs = (DMAAIOCB *)opaque;
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dbs->bh = qemu_bh_new(reschedule_dma, dbs);
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qemu_bh_schedule(dbs->bh);
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}
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static void dma_bdrv_unmap(DMAAIOCB *dbs)
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{
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int i;
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for (i = 0; i < dbs->iov.niov; ++i) {
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dma_memory_unmap(dbs->sg->dma, dbs->iov.iov[i].iov_base,
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dbs->iov.iov[i].iov_len, dbs->dir,
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dbs->iov.iov[i].iov_len);
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}
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qemu_iovec_reset(&dbs->iov);
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}
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static void dma_complete(DMAAIOCB *dbs, int ret)
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{
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trace_dma_complete(dbs, ret, dbs->common.cb);
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dma_bdrv_unmap(dbs);
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if (dbs->common.cb) {
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dbs->common.cb(dbs->common.opaque, ret);
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}
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qemu_iovec_destroy(&dbs->iov);
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if (dbs->bh) {
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qemu_bh_delete(dbs->bh);
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dbs->bh = NULL;
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}
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if (!dbs->in_cancel) {
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/* Requests may complete while dma_aio_cancel is in progress. In
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* this case, the AIOCB should not be released because it is still
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* referenced by dma_aio_cancel. */
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qemu_aio_release(dbs);
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}
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}
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static void dma_bdrv_cb(void *opaque, int ret)
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{
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DMAAIOCB *dbs = (DMAAIOCB *)opaque;
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dma_addr_t cur_addr, cur_len;
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void *mem;
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trace_dma_bdrv_cb(dbs, ret);
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dbs->acb = NULL;
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dbs->sector_num += dbs->iov.size / 512;
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dma_bdrv_unmap(dbs);
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if (dbs->sg_cur_index == dbs->sg->nsg || ret < 0) {
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dma_complete(dbs, ret);
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return;
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}
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while (dbs->sg_cur_index < dbs->sg->nsg) {
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cur_addr = dbs->sg->sg[dbs->sg_cur_index].base + dbs->sg_cur_byte;
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cur_len = dbs->sg->sg[dbs->sg_cur_index].len - dbs->sg_cur_byte;
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mem = dma_memory_map(dbs->sg->dma, cur_addr, &cur_len, dbs->dir);
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if (!mem)
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break;
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qemu_iovec_add(&dbs->iov, mem, cur_len);
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dbs->sg_cur_byte += cur_len;
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if (dbs->sg_cur_byte == dbs->sg->sg[dbs->sg_cur_index].len) {
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dbs->sg_cur_byte = 0;
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++dbs->sg_cur_index;
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}
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}
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if (dbs->iov.size == 0) {
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trace_dma_map_wait(dbs);
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cpu_register_map_client(dbs, continue_after_map_failure);
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return;
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}
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dbs->acb = dbs->io_func(dbs->bs, dbs->sector_num, &dbs->iov,
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dbs->iov.size / 512, dma_bdrv_cb, dbs);
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assert(dbs->acb);
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}
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static void dma_aio_cancel(BlockDriverAIOCB *acb)
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{
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DMAAIOCB *dbs = container_of(acb, DMAAIOCB, common);
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trace_dma_aio_cancel(dbs);
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if (dbs->acb) {
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BlockDriverAIOCB *acb = dbs->acb;
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dbs->acb = NULL;
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dbs->in_cancel = true;
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bdrv_aio_cancel(acb);
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dbs->in_cancel = false;
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}
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dbs->common.cb = NULL;
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dma_complete(dbs, 0);
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}
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static AIOPool dma_aio_pool = {
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.aiocb_size = sizeof(DMAAIOCB),
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.cancel = dma_aio_cancel,
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};
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BlockDriverAIOCB *dma_bdrv_io(
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BlockDriverState *bs, QEMUSGList *sg, uint64_t sector_num,
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DMAIOFunc *io_func, BlockDriverCompletionFunc *cb,
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void *opaque, DMADirection dir)
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{
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DMAAIOCB *dbs = qemu_aio_get(&dma_aio_pool, bs, cb, opaque);
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trace_dma_bdrv_io(dbs, bs, sector_num, (dir == DMA_DIRECTION_TO_DEVICE));
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dbs->acb = NULL;
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dbs->bs = bs;
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dbs->sg = sg;
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dbs->sector_num = sector_num;
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dbs->sg_cur_index = 0;
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dbs->sg_cur_byte = 0;
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dbs->dir = dir;
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dbs->io_func = io_func;
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dbs->bh = NULL;
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qemu_iovec_init(&dbs->iov, sg->nsg);
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dma_bdrv_cb(dbs, 0);
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return &dbs->common;
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}
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BlockDriverAIOCB *dma_bdrv_read(BlockDriverState *bs,
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QEMUSGList *sg, uint64_t sector,
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void (*cb)(void *opaque, int ret), void *opaque)
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{
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return dma_bdrv_io(bs, sg, sector, bdrv_aio_readv, cb, opaque,
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DMA_DIRECTION_FROM_DEVICE);
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}
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BlockDriverAIOCB *dma_bdrv_write(BlockDriverState *bs,
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QEMUSGList *sg, uint64_t sector,
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void (*cb)(void *opaque, int ret), void *opaque)
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{
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return dma_bdrv_io(bs, sg, sector, bdrv_aio_writev, cb, opaque,
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DMA_DIRECTION_TO_DEVICE);
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}
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static uint64_t dma_buf_rw(uint8_t *ptr, int32_t len, QEMUSGList *sg,
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DMADirection dir)
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{
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uint64_t resid;
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int sg_cur_index;
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resid = sg->size;
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sg_cur_index = 0;
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len = MIN(len, resid);
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while (len > 0) {
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ScatterGatherEntry entry = sg->sg[sg_cur_index++];
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int32_t xfer = MIN(len, entry.len);
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dma_memory_rw(sg->dma, entry.base, ptr, xfer, dir);
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ptr += xfer;
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len -= xfer;
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resid -= xfer;
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}
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return resid;
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}
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uint64_t dma_buf_read(uint8_t *ptr, int32_t len, QEMUSGList *sg)
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{
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return dma_buf_rw(ptr, len, sg, DMA_DIRECTION_FROM_DEVICE);
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}
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uint64_t dma_buf_write(uint8_t *ptr, int32_t len, QEMUSGList *sg)
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{
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return dma_buf_rw(ptr, len, sg, DMA_DIRECTION_TO_DEVICE);
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}
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void dma_acct_start(BlockDriverState *bs, BlockAcctCookie *cookie,
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QEMUSGList *sg, enum BlockAcctType type)
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{
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bdrv_acct_start(bs, cookie, sg->size, type);
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}
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bool iommu_dma_memory_valid(DMAContext *dma, dma_addr_t addr, dma_addr_t len,
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DMADirection dir)
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{
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hwaddr paddr, plen;
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#ifdef DEBUG_IOMMU
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fprintf(stderr, "dma_memory_check context=%p addr=0x" DMA_ADDR_FMT
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" len=0x" DMA_ADDR_FMT " dir=%d\n", dma, addr, len, dir);
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#endif
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while (len) {
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if (dma->translate(dma, addr, &paddr, &plen, dir) != 0) {
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return false;
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}
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/* The translation might be valid for larger regions. */
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if (plen > len) {
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plen = len;
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}
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len -= plen;
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addr += plen;
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}
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return true;
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}
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int iommu_dma_memory_rw(DMAContext *dma, dma_addr_t addr,
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void *buf, dma_addr_t len, DMADirection dir)
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{
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hwaddr paddr, plen;
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int err;
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#ifdef DEBUG_IOMMU
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fprintf(stderr, "dma_memory_rw context=%p addr=0x" DMA_ADDR_FMT " len=0x"
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DMA_ADDR_FMT " dir=%d\n", dma, addr, len, dir);
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#endif
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while (len) {
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err = dma->translate(dma, addr, &paddr, &plen, dir);
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if (err) {
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/*
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* In case of failure on reads from the guest, we clean the
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* destination buffer so that a device that doesn't test
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* for errors will not expose qemu internal memory.
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*/
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memset(buf, 0, len);
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return -1;
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}
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/* The translation might be valid for larger regions. */
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if (plen > len) {
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plen = len;
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}
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address_space_rw(dma->as, paddr, buf, plen, dir == DMA_DIRECTION_FROM_DEVICE);
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len -= plen;
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addr += plen;
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buf += plen;
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}
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return 0;
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}
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int iommu_dma_memory_set(DMAContext *dma, dma_addr_t addr, uint8_t c,
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dma_addr_t len)
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{
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hwaddr paddr, plen;
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int err;
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#ifdef DEBUG_IOMMU
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fprintf(stderr, "dma_memory_set context=%p addr=0x" DMA_ADDR_FMT
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" len=0x" DMA_ADDR_FMT "\n", dma, addr, len);
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#endif
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while (len) {
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err = dma->translate(dma, addr, &paddr, &plen,
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DMA_DIRECTION_FROM_DEVICE);
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if (err) {
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return err;
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}
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/* The translation might be valid for larger regions. */
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if (plen > len) {
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plen = len;
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}
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do_dma_memory_set(dma->as, paddr, c, plen);
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len -= plen;
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addr += plen;
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}
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return 0;
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}
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void dma_context_init(DMAContext *dma, AddressSpace *as, DMATranslateFunc translate,
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DMAMapFunc map, DMAUnmapFunc unmap)
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{
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#ifdef DEBUG_IOMMU
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fprintf(stderr, "dma_context_init(%p, %p, %p, %p)\n",
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dma, translate, map, unmap);
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#endif
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dma->as = as;
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dma->translate = translate;
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dma->map = map;
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dma->unmap = unmap;
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}
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void *iommu_dma_memory_map(DMAContext *dma, dma_addr_t addr, dma_addr_t *len,
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DMADirection dir)
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{
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int err;
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hwaddr paddr, plen;
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void *buf;
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if (dma->map) {
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return dma->map(dma, addr, len, dir);
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}
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plen = *len;
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err = dma->translate(dma, addr, &paddr, &plen, dir);
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if (err) {
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return NULL;
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}
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/*
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* If this is true, the virtual region is contiguous,
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* but the translated physical region isn't. We just
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* clamp *len, much like address_space_map() does.
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*/
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if (plen < *len) {
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*len = plen;
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}
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buf = address_space_map(dma->as, paddr, &plen, dir == DMA_DIRECTION_FROM_DEVICE);
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*len = plen;
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return buf;
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}
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void iommu_dma_memory_unmap(DMAContext *dma, void *buffer, dma_addr_t len,
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DMADirection dir, dma_addr_t access_len)
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{
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if (dma->unmap) {
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dma->unmap(dma, buffer, len, dir, access_len);
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return;
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}
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address_space_unmap(dma->as, buffer, len, dir == DMA_DIRECTION_FROM_DEVICE,
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access_len);
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}
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