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3686119875
The CPU / CPU state are forward declared. $ git grep -E 'struct [A-Za-z]+CPU\ \*' target/arm/hvf_arm.h:16:void hvf_arm_set_cpu_features_from_host(struct ARMCPU *cpu); target/openrisc/cpu.h:234: int (*cpu_openrisc_map_address_code)(struct OpenRISCCPU *cpu, target/openrisc/cpu.h:238: int (*cpu_openrisc_map_address_data)(struct OpenRISCCPU *cpu, $ git grep -E 'struct CPU[A-Za-z0-9]+State\ \*' target/mips/internal.h:137: int (*map_address)(struct CPUMIPSState *env, hwaddr *physical, int *prot, target/mips/internal.h:139: void (*helper_tlbwi)(struct CPUMIPSState *env); target/mips/internal.h:140: void (*helper_tlbwr)(struct CPUMIPSState *env); target/mips/internal.h:141: void (*helper_tlbp)(struct CPUMIPSState *env); target/mips/internal.h:142: void (*helper_tlbr)(struct CPUMIPSState *env); target/mips/internal.h:143: void (*helper_tlbinv)(struct CPUMIPSState *env); target/mips/internal.h:144: void (*helper_tlbinvf)(struct CPUMIPSState *env); target/xtensa/cpu.h:347: struct CPUXtensaState *env; ... Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20220214183144.27402-12-f4bug@amsat.org>
51 lines
2 KiB
C
51 lines
2 KiB
C
/*
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* Copyright (C) 2016 Veertu Inc,
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* Copyright (C) 2017 Google Inc,
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2.1 of the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this program; if not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef X86_EMU_H
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#define X86_EMU_H
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#include "x86.h"
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#include "x86_decode.h"
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#include "cpu.h"
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void init_emu(void);
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bool exec_instruction(CPUX86State *env, struct x86_decode *ins);
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void load_regs(struct CPUState *cpu);
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void store_regs(struct CPUState *cpu);
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void simulate_rdmsr(struct CPUState *cpu);
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void simulate_wrmsr(struct CPUState *cpu);
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target_ulong read_reg(CPUX86State *env, int reg, int size);
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void write_reg(CPUX86State *env, int reg, target_ulong val, int size);
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target_ulong read_val_from_reg(target_ulong reg_ptr, int size);
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void write_val_to_reg(target_ulong reg_ptr, target_ulong val, int size);
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void write_val_ext(CPUX86State *env, target_ulong ptr, target_ulong val, int size);
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uint8_t *read_mmio(CPUX86State *env, target_ulong ptr, int bytes);
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target_ulong read_val_ext(CPUX86State *env, target_ulong ptr, int size);
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void exec_movzx(CPUX86State *env, struct x86_decode *decode);
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void exec_shl(CPUX86State *env, struct x86_decode *decode);
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void exec_movsx(CPUX86State *env, struct x86_decode *decode);
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void exec_ror(CPUX86State *env, struct x86_decode *decode);
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void exec_rol(CPUX86State *env, struct x86_decode *decode);
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void exec_rcl(CPUX86State *env, struct x86_decode *decode);
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void exec_rcr(CPUX86State *env, struct x86_decode *decode);
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#endif
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