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https://gitlab.com/qemu-project/qemu
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277ee17212
POWER9 DD2.1 and earlier had significant limitations when running KVM, including lack of "mixed mode" MMU support (ability to run HPT and RPT mode on threads of the same core), and a translation prefetch issue which is worked around by disabling "AIL" mode for the guest. These processors are not widely available, and it's difficult to deal with all these quirks in qemu +/- KVM, so create a POWER9 DD2.2 CPU and make it the default POWER9 CPU. Signed-off-by: Nicholas Piggin <npiggin@gmail.com> Reviewed-by: Frederic Barrat <fbarrat@linux.ibm.com> Reviewed-by: Harsh Prateek Bora <harshpb@linux.ibm.com> Message-Id: <20230515160201.394587-1-npiggin@gmail.com> Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
483 lines
24 KiB
C
483 lines
24 KiB
C
/*
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* PowerPC CPU initialization for qemu.
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*
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* Copyright (c) 2003-2007 Jocelyn Mayer
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* Copyright 2011 Freescale Semiconductor, Inc.
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* Copyright 2013 SUSE LINUX Products GmbH
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2.1 of the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef TARGET_PPC_CPU_MODELS_H
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#define TARGET_PPC_CPU_MODELS_H
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/**
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* PowerPCCPUAlias:
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* @alias: The alias name.
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* @model: The CPU model @alias refers to, that directly resolves into CPU type
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*
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* A mapping entry from CPU @alias to CPU @model.
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*/
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typedef struct PowerPCCPUAlias {
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const char *alias;
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const char *model;
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} PowerPCCPUAlias;
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extern PowerPCCPUAlias ppc_cpu_aliases[];
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/*****************************************************************************/
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/* PVR definitions for most known PowerPC */
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enum {
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/* IBM Processor for Network Resources */
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CPU_POWERPC_COBRA = 0x10100000, /* XXX: 405 ? */
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/* PowerPC 405 family */
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/* PowerPC 405 cores */
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CPU_POWERPC_405D2 = 0x20010000,
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CPU_POWERPC_405D4 = 0x41810000,
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/* PowerPC 405 microcontrolers */
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/* XXX: missing 0x200108a0 */
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CPU_POWERPC_405CRa = 0x40110041,
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CPU_POWERPC_405CRb = 0x401100C5,
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CPU_POWERPC_405CRc = 0x40110145,
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CPU_POWERPC_405EP = 0x51210950,
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CPU_POWERPC_405EZ = 0x41511460, /* 0x51210950 ? */
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CPU_POWERPC_405GPa = 0x40110000,
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CPU_POWERPC_405GPb = 0x40110040,
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CPU_POWERPC_405GPc = 0x40110082,
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CPU_POWERPC_405GPd = 0x401100C4,
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CPU_POWERPC_405GPR = 0x50910951,
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CPU_POWERPC_405LP = 0x41F10000,
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/* IBM network processors */
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CPU_POWERPC_NPE405H = 0x414100C0,
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CPU_POWERPC_NPE405H2 = 0x41410140,
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CPU_POWERPC_NPE405L = 0x416100C0,
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CPU_POWERPC_NPE4GS3 = 0x40B10000,
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/* IBM STBxxx (PowerPC 401/403/405 core based microcontrollers) */
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CPU_POWERPC_STB03 = 0x40310000, /* 0x40130000 ? */
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CPU_POWERPC_STB04 = 0x41810000,
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CPU_POWERPC_STB25 = 0x51510950,
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/* Xilinx cores */
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CPU_POWERPC_X2VP4 = 0x20010820,
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CPU_POWERPC_X2VP20 = 0x20010860,
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/* PowerPC 440 family */
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/* Generic PowerPC 440 */
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#define CPU_POWERPC_440 CPU_POWERPC_440GXf
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/* PowerPC 440 cores */
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CPU_POWERPC_440_XILINX = 0x7ff21910,
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/* PowerPC 440 microcontrolers */
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CPU_POWERPC_440EPa = 0x42221850,
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CPU_POWERPC_440EPb = 0x422218D3,
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CPU_POWERPC_440GPb = 0x40120440,
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CPU_POWERPC_440GPc = 0x40120481,
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#define CPU_POWERPC_440GRa CPU_POWERPC_440EPb
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CPU_POWERPC_440GRX = 0x200008D0,
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#define CPU_POWERPC_440EPX CPU_POWERPC_440GRX
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CPU_POWERPC_440GXa = 0x51B21850,
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CPU_POWERPC_440GXb = 0x51B21851,
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CPU_POWERPC_440GXc = 0x51B21892,
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CPU_POWERPC_440GXf = 0x51B21894,
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CPU_POWERPC_440SP = 0x53221850,
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CPU_POWERPC_440SP2 = 0x53221891,
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CPU_POWERPC_440SPE = 0x53421890,
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CPU_POWERPC_460EXb = 0x130218A4, /* called 460 but 440 core */
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/* Freescale embedded PowerPC cores */
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/* PowerPC MPC 5xx cores (aka RCPU) */
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CPU_POWERPC_MPC5xx = 0x00020020,
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/* PowerPC MPC 8xx cores (aka PowerQUICC) */
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CPU_POWERPC_MPC8xx = 0x00500000,
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/* G2 cores (aka PowerQUICC-II) */
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CPU_POWERPC_G2 = 0x00810011,
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CPU_POWERPC_G2H4 = 0x80811010,
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CPU_POWERPC_G2gp = 0x80821010,
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CPU_POWERPC_G2ls = 0x90810010,
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CPU_POWERPC_MPC603 = 0x00810100,
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CPU_POWERPC_G2_HIP3 = 0x00810101,
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CPU_POWERPC_G2_HIP4 = 0x80811014,
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/* G2_LE core (aka PowerQUICC-II) */
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CPU_POWERPC_G2LE = 0x80820010,
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CPU_POWERPC_G2LEgp = 0x80822010,
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CPU_POWERPC_G2LEls = 0xA0822010,
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CPU_POWERPC_G2LEgp1 = 0x80822011,
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CPU_POWERPC_G2LEgp3 = 0x80822013,
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/* MPC52xx microcontrollers */
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/* XXX: MPC 5121 ? */
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#define CPU_POWERPC_MPC5200_v10 CPU_POWERPC_G2LEgp1
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#define CPU_POWERPC_MPC5200_v11 CPU_POWERPC_G2LEgp1
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#define CPU_POWERPC_MPC5200_v12 CPU_POWERPC_G2LEgp1
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#define CPU_POWERPC_MPC5200B_v20 CPU_POWERPC_G2LEgp1
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#define CPU_POWERPC_MPC5200B_v21 CPU_POWERPC_G2LEgp1
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/* e200 family */
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/* e200 cores */
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CPU_POWERPC_e200z5 = 0x81000000,
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CPU_POWERPC_e200z6 = 0x81120000,
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/* e300 family */
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/* e300 cores */
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CPU_POWERPC_e300c1 = 0x00830010,
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CPU_POWERPC_e300c2 = 0x00840010,
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CPU_POWERPC_e300c3 = 0x00850010,
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CPU_POWERPC_e300c4 = 0x00860010,
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/* MPC83xx microcontrollers */
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#define CPU_POWERPC_MPC834x CPU_POWERPC_e300c1
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#define CPU_POWERPC_MPC837x CPU_POWERPC_e300c4
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/* e500 family */
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/* e500 cores */
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#define CPU_POWERPC_e500 CPU_POWERPC_e500v2_v22
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CPU_POWERPC_e500v1_v10 = 0x80200010,
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CPU_POWERPC_e500v1_v20 = 0x80200020,
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CPU_POWERPC_e500v2_v10 = 0x80210010,
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CPU_POWERPC_e500v2_v11 = 0x80210011,
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CPU_POWERPC_e500v2_v20 = 0x80210020,
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CPU_POWERPC_e500v2_v21 = 0x80210021,
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CPU_POWERPC_e500v2_v22 = 0x80210022,
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CPU_POWERPC_e500v2_v30 = 0x80210030,
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CPU_POWERPC_e500mc = 0x80230020,
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CPU_POWERPC_e5500 = 0x80240020,
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CPU_POWERPC_e6500 = 0x80400020,
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/* MPC85xx microcontrollers */
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#define CPU_POWERPC_MPC8533_v10 CPU_POWERPC_e500v2_v21
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#define CPU_POWERPC_MPC8533_v11 CPU_POWERPC_e500v2_v22
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#define CPU_POWERPC_MPC8533E_v10 CPU_POWERPC_e500v2_v21
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#define CPU_POWERPC_MPC8533E_v11 CPU_POWERPC_e500v2_v22
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#define CPU_POWERPC_MPC8540_v10 CPU_POWERPC_e500v1_v10
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#define CPU_POWERPC_MPC8540_v20 CPU_POWERPC_e500v1_v20
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#define CPU_POWERPC_MPC8540_v21 CPU_POWERPC_e500v1_v20
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#define CPU_POWERPC_MPC8541_v10 CPU_POWERPC_e500v1_v20
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#define CPU_POWERPC_MPC8541_v11 CPU_POWERPC_e500v1_v20
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#define CPU_POWERPC_MPC8541E_v10 CPU_POWERPC_e500v1_v20
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#define CPU_POWERPC_MPC8541E_v11 CPU_POWERPC_e500v1_v20
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#define CPU_POWERPC_MPC8543_v10 CPU_POWERPC_e500v2_v10
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#define CPU_POWERPC_MPC8543_v11 CPU_POWERPC_e500v2_v11
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#define CPU_POWERPC_MPC8543_v20 CPU_POWERPC_e500v2_v20
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#define CPU_POWERPC_MPC8543_v21 CPU_POWERPC_e500v2_v21
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#define CPU_POWERPC_MPC8543E_v10 CPU_POWERPC_e500v2_v10
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#define CPU_POWERPC_MPC8543E_v11 CPU_POWERPC_e500v2_v11
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#define CPU_POWERPC_MPC8543E_v20 CPU_POWERPC_e500v2_v20
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#define CPU_POWERPC_MPC8543E_v21 CPU_POWERPC_e500v2_v21
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#define CPU_POWERPC_MPC8544_v10 CPU_POWERPC_e500v2_v21
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#define CPU_POWERPC_MPC8544_v11 CPU_POWERPC_e500v2_v22
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#define CPU_POWERPC_MPC8544E_v11 CPU_POWERPC_e500v2_v22
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#define CPU_POWERPC_MPC8544E_v10 CPU_POWERPC_e500v2_v21
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#define CPU_POWERPC_MPC8545_v10 CPU_POWERPC_e500v2_v10
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#define CPU_POWERPC_MPC8545_v20 CPU_POWERPC_e500v2_v20
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#define CPU_POWERPC_MPC8545_v21 CPU_POWERPC_e500v2_v21
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#define CPU_POWERPC_MPC8545E_v10 CPU_POWERPC_e500v2_v10
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#define CPU_POWERPC_MPC8545E_v20 CPU_POWERPC_e500v2_v20
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#define CPU_POWERPC_MPC8545E_v21 CPU_POWERPC_e500v2_v21
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#define CPU_POWERPC_MPC8547E_v10 CPU_POWERPC_e500v2_v10
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#define CPU_POWERPC_MPC8547E_v20 CPU_POWERPC_e500v2_v20
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#define CPU_POWERPC_MPC8547E_v21 CPU_POWERPC_e500v2_v21
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#define CPU_POWERPC_MPC8548_v10 CPU_POWERPC_e500v2_v10
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#define CPU_POWERPC_MPC8548_v11 CPU_POWERPC_e500v2_v11
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#define CPU_POWERPC_MPC8548_v20 CPU_POWERPC_e500v2_v20
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#define CPU_POWERPC_MPC8548_v21 CPU_POWERPC_e500v2_v21
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#define CPU_POWERPC_MPC8548E_v10 CPU_POWERPC_e500v2_v10
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#define CPU_POWERPC_MPC8548E_v11 CPU_POWERPC_e500v2_v11
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#define CPU_POWERPC_MPC8548E_v20 CPU_POWERPC_e500v2_v20
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#define CPU_POWERPC_MPC8548E_v21 CPU_POWERPC_e500v2_v21
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#define CPU_POWERPC_MPC8555_v10 CPU_POWERPC_e500v1_v20
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#define CPU_POWERPC_MPC8555_v11 CPU_POWERPC_e500v1_v20
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#define CPU_POWERPC_MPC8555E_v10 CPU_POWERPC_e500v1_v20
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#define CPU_POWERPC_MPC8555E_v11 CPU_POWERPC_e500v1_v20
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#define CPU_POWERPC_MPC8560_v10 CPU_POWERPC_e500v1_v10
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#define CPU_POWERPC_MPC8560_v20 CPU_POWERPC_e500v1_v20
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#define CPU_POWERPC_MPC8560_v21 CPU_POWERPC_e500v1_v20
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#define CPU_POWERPC_MPC8567 CPU_POWERPC_e500v2_v22
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#define CPU_POWERPC_MPC8567E CPU_POWERPC_e500v2_v22
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#define CPU_POWERPC_MPC8568 CPU_POWERPC_e500v2_v22
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#define CPU_POWERPC_MPC8568E CPU_POWERPC_e500v2_v22
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#define CPU_POWERPC_MPC8572 CPU_POWERPC_e500v2_v30
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#define CPU_POWERPC_MPC8572E CPU_POWERPC_e500v2_v30
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/* e600 family */
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/* e600 cores */
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CPU_POWERPC_e600 = 0x80040010,
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/* MPC86xx microcontrollers */
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#define CPU_POWERPC_MPC8610 CPU_POWERPC_e600
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#define CPU_POWERPC_MPC8641 CPU_POWERPC_e600
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#define CPU_POWERPC_MPC8641D CPU_POWERPC_e600
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/* PowerPC 6xx cores */
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CPU_POWERPC_603 = 0x00030100,
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CPU_POWERPC_603E_v11 = 0x00060101,
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CPU_POWERPC_603E_v12 = 0x00060102,
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CPU_POWERPC_603E_v13 = 0x00060103,
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CPU_POWERPC_603E_v14 = 0x00060104,
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CPU_POWERPC_603E_v22 = 0x00060202,
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CPU_POWERPC_603E_v3 = 0x00060300,
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CPU_POWERPC_603E_v4 = 0x00060400,
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CPU_POWERPC_603E_v41 = 0x00060401,
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CPU_POWERPC_603E7t = 0x00071201,
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CPU_POWERPC_603E7v = 0x00070100,
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CPU_POWERPC_603E7v1 = 0x00070101,
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CPU_POWERPC_603E7v2 = 0x00070201,
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CPU_POWERPC_603E7 = 0x00070200,
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CPU_POWERPC_603P = 0x00070000,
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/* XXX: missing 0x00040303 (604) */
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CPU_POWERPC_604 = 0x00040103,
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/* XXX: missing 0x00091203 */
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/* XXX: missing 0x00092110 */
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/* XXX: missing 0x00092120 */
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CPU_POWERPC_604E_v10 = 0x00090100,
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CPU_POWERPC_604E_v22 = 0x00090202,
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CPU_POWERPC_604E_v24 = 0x00090204,
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/* XXX: missing 0x000a0100 */
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/* XXX: missing 0x00093102 */
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CPU_POWERPC_604R = 0x000a0101,
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/* PowerPC 740/750 cores (aka G3) */
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/* XXX: missing 0x00084202 */
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CPU_POWERPC_7x0_v10 = 0x00080100,
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CPU_POWERPC_7x0_v20 = 0x00080200,
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CPU_POWERPC_7x0_v21 = 0x00080201,
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CPU_POWERPC_7x0_v22 = 0x00080202,
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CPU_POWERPC_7x0_v30 = 0x00080300,
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CPU_POWERPC_7x0_v31 = 0x00080301,
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CPU_POWERPC_740E = 0x00080100,
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CPU_POWERPC_750E = 0x00080200,
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CPU_POWERPC_7x0P = 0x10080000,
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/* XXX: missing 0x00087010 (CL ?) */
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CPU_POWERPC_750CL_v10 = 0x00087200,
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CPU_POWERPC_750CL_v20 = 0x00087210, /* aka rev E */
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CPU_POWERPC_750CX_v10 = 0x00082100,
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CPU_POWERPC_750CX_v20 = 0x00082200,
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CPU_POWERPC_750CX_v21 = 0x00082201,
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CPU_POWERPC_750CX_v22 = 0x00082202,
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CPU_POWERPC_750CXE_v21 = 0x00082211,
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CPU_POWERPC_750CXE_v22 = 0x00082212,
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CPU_POWERPC_750CXE_v23 = 0x00082213,
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CPU_POWERPC_750CXE_v24 = 0x00082214,
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CPU_POWERPC_750CXE_v24b = 0x00083214,
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CPU_POWERPC_750CXE_v30 = 0x00082310,
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CPU_POWERPC_750CXE_v31 = 0x00082311,
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CPU_POWERPC_750CXE_v31b = 0x00083311,
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CPU_POWERPC_750CXR = 0x00083410,
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CPU_POWERPC_750FL = 0x70000203,
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CPU_POWERPC_750FX_v10 = 0x70000100,
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CPU_POWERPC_750FX_v20 = 0x70000200,
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CPU_POWERPC_750FX_v21 = 0x70000201,
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CPU_POWERPC_750FX_v22 = 0x70000202,
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CPU_POWERPC_750FX_v23 = 0x70000203,
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CPU_POWERPC_750GL = 0x70020102,
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CPU_POWERPC_750GX_v10 = 0x70020100,
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CPU_POWERPC_750GX_v11 = 0x70020101,
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CPU_POWERPC_750GX_v12 = 0x70020102,
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CPU_POWERPC_750L_v20 = 0x00088200,
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CPU_POWERPC_750L_v21 = 0x00088201,
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CPU_POWERPC_750L_v22 = 0x00088202,
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CPU_POWERPC_750L_v30 = 0x00088300,
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CPU_POWERPC_750L_v32 = 0x00088302,
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/* PowerPC 745/755 cores */
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CPU_POWERPC_7x5_v10 = 0x00083100,
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CPU_POWERPC_7x5_v11 = 0x00083101,
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CPU_POWERPC_7x5_v20 = 0x00083200,
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CPU_POWERPC_7x5_v21 = 0x00083201,
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CPU_POWERPC_7x5_v22 = 0x00083202, /* aka D */
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CPU_POWERPC_7x5_v23 = 0x00083203, /* aka E */
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CPU_POWERPC_7x5_v24 = 0x00083204,
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CPU_POWERPC_7x5_v25 = 0x00083205,
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CPU_POWERPC_7x5_v26 = 0x00083206,
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CPU_POWERPC_7x5_v27 = 0x00083207,
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CPU_POWERPC_7x5_v28 = 0x00083208,
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/* PowerPC 74xx cores (aka G4) */
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/* XXX: missing 0x000C1101 */
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CPU_POWERPC_7400_v10 = 0x000C0100,
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CPU_POWERPC_7400_v11 = 0x000C0101,
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CPU_POWERPC_7400_v20 = 0x000C0200,
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CPU_POWERPC_7400_v21 = 0x000C0201,
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CPU_POWERPC_7400_v22 = 0x000C0202,
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CPU_POWERPC_7400_v26 = 0x000C0206,
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CPU_POWERPC_7400_v27 = 0x000C0207,
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CPU_POWERPC_7400_v28 = 0x000C0208,
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CPU_POWERPC_7400_v29 = 0x000C0209,
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CPU_POWERPC_7410_v10 = 0x800C1100,
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CPU_POWERPC_7410_v11 = 0x800C1101,
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CPU_POWERPC_7410_v12 = 0x800C1102, /* aka C */
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CPU_POWERPC_7410_v13 = 0x800C1103, /* aka D */
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CPU_POWERPC_7410_v14 = 0x800C1104, /* aka E */
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CPU_POWERPC_7448_v10 = 0x80040100,
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CPU_POWERPC_7448_v11 = 0x80040101,
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CPU_POWERPC_7448_v20 = 0x80040200,
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CPU_POWERPC_7448_v21 = 0x80040201,
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CPU_POWERPC_7450_v10 = 0x80000100,
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CPU_POWERPC_7450_v11 = 0x80000101,
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CPU_POWERPC_7450_v12 = 0x80000102,
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CPU_POWERPC_7450_v20 = 0x80000200, /* aka A, B, C, D: 2.04 */
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CPU_POWERPC_7450_v21 = 0x80000201, /* aka E */
|
|
CPU_POWERPC_74x1_v23 = 0x80000203, /* aka G: 2.3 */
|
|
/* XXX: this entry might be a bug in some documentation */
|
|
CPU_POWERPC_74x1_v210 = 0x80000210, /* aka G: 2.3 ? */
|
|
CPU_POWERPC_74x5_v10 = 0x80010100,
|
|
/* XXX: missing 0x80010200 */
|
|
CPU_POWERPC_74x5_v21 = 0x80010201, /* aka C: 2.1 */
|
|
CPU_POWERPC_74x5_v32 = 0x80010302,
|
|
CPU_POWERPC_74x5_v33 = 0x80010303, /* aka F: 3.3 */
|
|
CPU_POWERPC_74x5_v34 = 0x80010304, /* aka G: 3.4 */
|
|
CPU_POWERPC_74x7_v10 = 0x80020100, /* aka A: 1.0 */
|
|
CPU_POWERPC_74x7_v11 = 0x80020101, /* aka B: 1.1 */
|
|
CPU_POWERPC_74x7_v12 = 0x80020102, /* aka C: 1.2 */
|
|
CPU_POWERPC_74x7A_v10 = 0x80030100, /* aka A: 1.0 */
|
|
CPU_POWERPC_74x7A_v11 = 0x80030101, /* aka B: 1.1 */
|
|
CPU_POWERPC_74x7A_v12 = 0x80030102, /* aka C: 1.2 */
|
|
/* 64 bits PowerPC */
|
|
#if defined(TARGET_PPC64)
|
|
CPU_POWERPC_620 = 0x00140000,
|
|
CPU_POWERPC_630 = 0x00400000,
|
|
CPU_POWERPC_631 = 0x00410104,
|
|
CPU_POWERPC_POWER4 = 0x00350000,
|
|
CPU_POWERPC_POWER4P = 0x00380000,
|
|
/* XXX: missing 0x003A0201 */
|
|
CPU_POWERPC_POWER5 = 0x003A0203,
|
|
CPU_POWERPC_POWER5P_v21 = 0x003B0201,
|
|
CPU_POWERPC_POWER6 = 0x003E0000,
|
|
CPU_POWERPC_POWER_SERVER_MASK = 0xFFFF0000,
|
|
CPU_POWERPC_POWER7_BASE = 0x003F0000,
|
|
CPU_POWERPC_POWER7_v23 = 0x003F0203,
|
|
CPU_POWERPC_POWER7P_BASE = 0x004A0000,
|
|
CPU_POWERPC_POWER7P_v21 = 0x004A0201,
|
|
CPU_POWERPC_POWER8E_BASE = 0x004B0000,
|
|
CPU_POWERPC_POWER8E_v21 = 0x004B0201,
|
|
CPU_POWERPC_POWER8_BASE = 0x004D0000,
|
|
CPU_POWERPC_POWER8_v20 = 0x004D0200,
|
|
CPU_POWERPC_POWER8NVL_BASE = 0x004C0000,
|
|
CPU_POWERPC_POWER8NVL_v10 = 0x004C0100,
|
|
CPU_POWERPC_POWER9_BASE = 0x004E0000,
|
|
CPU_POWERPC_POWER9_DD1 = 0x004E1100,
|
|
CPU_POWERPC_POWER9_DD20 = 0x004E1200,
|
|
CPU_POWERPC_POWER9_DD22 = 0x004E1202,
|
|
CPU_POWERPC_POWER10_BASE = 0x00800000,
|
|
CPU_POWERPC_POWER10_DD1 = 0x00801100,
|
|
CPU_POWERPC_POWER10_DD20 = 0x00801200,
|
|
CPU_POWERPC_970_v22 = 0x00390202,
|
|
CPU_POWERPC_970FX_v10 = 0x00391100,
|
|
CPU_POWERPC_970FX_v20 = 0x003C0200,
|
|
CPU_POWERPC_970FX_v21 = 0x003C0201,
|
|
CPU_POWERPC_970FX_v30 = 0x003C0300,
|
|
CPU_POWERPC_970FX_v31 = 0x003C0301,
|
|
CPU_POWERPC_970MP_v10 = 0x00440100,
|
|
CPU_POWERPC_970MP_v11 = 0x00440101,
|
|
#define CPU_POWERPC_CELL CPU_POWERPC_CELL_v32
|
|
CPU_POWERPC_CELL_v10 = 0x00700100,
|
|
CPU_POWERPC_CELL_v20 = 0x00700400,
|
|
CPU_POWERPC_CELL_v30 = 0x00700500,
|
|
CPU_POWERPC_CELL_v31 = 0x00700501,
|
|
#define CPU_POWERPC_CELL_v32 CPU_POWERPC_CELL_v31
|
|
CPU_POWERPC_RS64 = 0x00330000,
|
|
CPU_POWERPC_RS64II = 0x00340000,
|
|
CPU_POWERPC_RS64III = 0x00360000,
|
|
CPU_POWERPC_RS64IV = 0x00370000,
|
|
#endif /* defined(TARGET_PPC64) */
|
|
/* Original POWER */
|
|
/*
|
|
* XXX: should be POWER (RIOS), RSC3308, RSC4608,
|
|
* POWER2 (RIOS2) & RSC2 (P2SC) here
|
|
*/
|
|
/* PA Semi core */
|
|
CPU_POWERPC_PA6T = 0x00900000,
|
|
};
|
|
|
|
/* Logical PVR definitions for sPAPR */
|
|
enum {
|
|
CPU_POWERPC_LOGICAL_2_04 = 0x0F000001,
|
|
CPU_POWERPC_LOGICAL_2_05 = 0x0F000002,
|
|
CPU_POWERPC_LOGICAL_2_06 = 0x0F000003,
|
|
CPU_POWERPC_LOGICAL_2_06_PLUS = 0x0F100003,
|
|
CPU_POWERPC_LOGICAL_2_07 = 0x0F000004,
|
|
CPU_POWERPC_LOGICAL_3_00 = 0x0F000005,
|
|
CPU_POWERPC_LOGICAL_3_10 = 0x0F000006,
|
|
};
|
|
|
|
/* System version register (used on MPC 8xxx) */
|
|
enum {
|
|
POWERPC_SVR_NONE = 0x00000000,
|
|
POWERPC_SVR_5200_v10 = 0x80110010,
|
|
POWERPC_SVR_5200_v11 = 0x80110011,
|
|
POWERPC_SVR_5200_v12 = 0x80110012,
|
|
POWERPC_SVR_5200B_v20 = 0x80110020,
|
|
POWERPC_SVR_5200B_v21 = 0x80110021,
|
|
#define POWERPC_SVR_55xx POWERPC_SVR_5567
|
|
POWERPC_SVR_8343 = 0x80570010,
|
|
POWERPC_SVR_8343A = 0x80570030,
|
|
POWERPC_SVR_8343E = 0x80560010,
|
|
POWERPC_SVR_8343EA = 0x80560030,
|
|
POWERPC_SVR_8347P = 0x80550010, /* PBGA package */
|
|
POWERPC_SVR_8347T = 0x80530010, /* TBGA package */
|
|
POWERPC_SVR_8347AP = 0x80550030, /* PBGA package */
|
|
POWERPC_SVR_8347AT = 0x80530030, /* TBGA package */
|
|
POWERPC_SVR_8347EP = 0x80540010, /* PBGA package */
|
|
POWERPC_SVR_8347ET = 0x80520010, /* TBGA package */
|
|
POWERPC_SVR_8347EAP = 0x80540030, /* PBGA package */
|
|
POWERPC_SVR_8347EAT = 0x80520030, /* TBGA package */
|
|
POWERPC_SVR_8349 = 0x80510010,
|
|
POWERPC_SVR_8349A = 0x80510030,
|
|
POWERPC_SVR_8349E = 0x80500010,
|
|
POWERPC_SVR_8349EA = 0x80500030,
|
|
#define POWERPC_SVR_E500 0x40000000
|
|
POWERPC_SVR_8377 = 0x80C70010 | POWERPC_SVR_E500,
|
|
POWERPC_SVR_8377E = 0x80C60010 | POWERPC_SVR_E500,
|
|
POWERPC_SVR_8378 = 0x80C50010 | POWERPC_SVR_E500,
|
|
POWERPC_SVR_8378E = 0x80C40010 | POWERPC_SVR_E500,
|
|
POWERPC_SVR_8379 = 0x80C30010 | POWERPC_SVR_E500,
|
|
POWERPC_SVR_8379E = 0x80C00010 | POWERPC_SVR_E500,
|
|
POWERPC_SVR_8533_v10 = 0x80340010 | POWERPC_SVR_E500,
|
|
POWERPC_SVR_8533_v11 = 0x80340011 | POWERPC_SVR_E500,
|
|
POWERPC_SVR_8533E_v10 = 0x803C0010 | POWERPC_SVR_E500,
|
|
POWERPC_SVR_8533E_v11 = 0x803C0011 | POWERPC_SVR_E500,
|
|
POWERPC_SVR_8540_v10 = 0x80300010 | POWERPC_SVR_E500,
|
|
POWERPC_SVR_8540_v20 = 0x80300020 | POWERPC_SVR_E500,
|
|
POWERPC_SVR_8540_v21 = 0x80300021 | POWERPC_SVR_E500,
|
|
POWERPC_SVR_8541_v10 = 0x80720010 | POWERPC_SVR_E500,
|
|
POWERPC_SVR_8541_v11 = 0x80720011 | POWERPC_SVR_E500,
|
|
POWERPC_SVR_8541E_v10 = 0x807A0010 | POWERPC_SVR_E500,
|
|
POWERPC_SVR_8541E_v11 = 0x807A0011 | POWERPC_SVR_E500,
|
|
POWERPC_SVR_8543_v10 = 0x80320010 | POWERPC_SVR_E500,
|
|
POWERPC_SVR_8543_v11 = 0x80320011 | POWERPC_SVR_E500,
|
|
POWERPC_SVR_8543_v20 = 0x80320020 | POWERPC_SVR_E500,
|
|
POWERPC_SVR_8543_v21 = 0x80320021 | POWERPC_SVR_E500,
|
|
POWERPC_SVR_8543E_v10 = 0x803A0010 | POWERPC_SVR_E500,
|
|
POWERPC_SVR_8543E_v11 = 0x803A0011 | POWERPC_SVR_E500,
|
|
POWERPC_SVR_8543E_v20 = 0x803A0020 | POWERPC_SVR_E500,
|
|
POWERPC_SVR_8543E_v21 = 0x803A0021 | POWERPC_SVR_E500,
|
|
POWERPC_SVR_8544_v10 = 0x80340110 | POWERPC_SVR_E500,
|
|
POWERPC_SVR_8544_v11 = 0x80340111 | POWERPC_SVR_E500,
|
|
POWERPC_SVR_8544E_v10 = 0x803C0110 | POWERPC_SVR_E500,
|
|
POWERPC_SVR_8544E_v11 = 0x803C0111 | POWERPC_SVR_E500,
|
|
POWERPC_SVR_8545_v20 = 0x80310220 | POWERPC_SVR_E500,
|
|
POWERPC_SVR_8545_v21 = 0x80310221 | POWERPC_SVR_E500,
|
|
POWERPC_SVR_8545E_v20 = 0x80390220 | POWERPC_SVR_E500,
|
|
POWERPC_SVR_8545E_v21 = 0x80390221 | POWERPC_SVR_E500,
|
|
POWERPC_SVR_8547E_v20 = 0x80390120 | POWERPC_SVR_E500,
|
|
POWERPC_SVR_8547E_v21 = 0x80390121 | POWERPC_SVR_E500,
|
|
POWERPC_SVR_8548_v10 = 0x80310010 | POWERPC_SVR_E500,
|
|
POWERPC_SVR_8548_v11 = 0x80310011 | POWERPC_SVR_E500,
|
|
POWERPC_SVR_8548_v20 = 0x80310020 | POWERPC_SVR_E500,
|
|
POWERPC_SVR_8548_v21 = 0x80310021 | POWERPC_SVR_E500,
|
|
POWERPC_SVR_8548E_v10 = 0x80390010 | POWERPC_SVR_E500,
|
|
POWERPC_SVR_8548E_v11 = 0x80390011 | POWERPC_SVR_E500,
|
|
POWERPC_SVR_8548E_v20 = 0x80390020 | POWERPC_SVR_E500,
|
|
POWERPC_SVR_8548E_v21 = 0x80390021 | POWERPC_SVR_E500,
|
|
POWERPC_SVR_8555_v10 = 0x80710010 | POWERPC_SVR_E500,
|
|
POWERPC_SVR_8555_v11 = 0x80710011 | POWERPC_SVR_E500,
|
|
POWERPC_SVR_8555E_v10 = 0x80790010 | POWERPC_SVR_E500,
|
|
POWERPC_SVR_8555E_v11 = 0x80790011 | POWERPC_SVR_E500,
|
|
POWERPC_SVR_8560_v10 = 0x80700010 | POWERPC_SVR_E500,
|
|
POWERPC_SVR_8560_v20 = 0x80700020 | POWERPC_SVR_E500,
|
|
POWERPC_SVR_8560_v21 = 0x80700021 | POWERPC_SVR_E500,
|
|
POWERPC_SVR_8567 = 0x80750111 | POWERPC_SVR_E500,
|
|
POWERPC_SVR_8567E = 0x807D0111 | POWERPC_SVR_E500,
|
|
POWERPC_SVR_8568 = 0x80750011 | POWERPC_SVR_E500,
|
|
POWERPC_SVR_8568E = 0x807D0011 | POWERPC_SVR_E500,
|
|
POWERPC_SVR_8572 = 0x80E00010 | POWERPC_SVR_E500,
|
|
POWERPC_SVR_8572E = 0x80E80010 | POWERPC_SVR_E500,
|
|
POWERPC_SVR_8610 = 0x80A00011,
|
|
POWERPC_SVR_8641 = 0x80900021,
|
|
POWERPC_SVR_8641D = 0x80900121,
|
|
};
|
|
|
|
#endif
|