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https://gitlab.com/qemu-project/qemu
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18cef1c6a5
Emulation of a simple CXL Switch downstream port. The Device ID has been allocated for this use. Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Message-Id: <20220616145126.8002-3-Jonathan.Cameron@huawei.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
19 lines
954 B
Meson
19 lines
954 B
Meson
pci_ss = ss.source_set()
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pci_ss.add(files('pci_bridge_dev.c'))
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pci_ss.add(when: 'CONFIG_I82801B11', if_true: files('i82801b11.c'))
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pci_ss.add(when: 'CONFIG_IOH3420', if_true: files('ioh3420.c'))
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pci_ss.add(when: 'CONFIG_PCIE_PORT', if_true: files('pcie_root_port.c', 'gen_pcie_root_port.c', 'pcie_pci_bridge.c'))
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pci_ss.add(when: 'CONFIG_PXB', if_true: files('pci_expander_bridge.c'),
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if_false: files('pci_expander_bridge_stubs.c'))
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pci_ss.add(when: 'CONFIG_XIO3130', if_true: files('xio3130_upstream.c', 'xio3130_downstream.c'))
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pci_ss.add(when: 'CONFIG_CXL', if_true: files('cxl_root_port.c', 'cxl_upstream.c', 'cxl_downstream.c'))
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# NewWorld PowerMac
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pci_ss.add(when: 'CONFIG_DEC_PCI', if_true: files('dec.c'))
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# Sun4u
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pci_ss.add(when: 'CONFIG_SIMBA', if_true: files('simba.c'))
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softmmu_ss.add_all(when: 'CONFIG_PCI', if_true: pci_ss)
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softmmu_ss.add(when: 'CONFIG_ALL', if_true: files('pci_expander_bridge_stubs.c'))
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