qemu/linux-user
Anton Blanchard 6bb9a0a9ef target-ppc: Fix SRR0 when taking unaligned exceptions
We are setting SRR0 to the instruction before the one causing the
unaligned exception. A quick testcase:

. = 0x100
.globl _start
_start:
	/* Cause a 0x600 */
	li	3,0x1
	stwcx.	3,0,3
1:	b	1b

. = 0x600
1:	b	1b

Built into something we can load as a BIOS image:

gcc -mbig -c test.S
ld -EB -Ttext 0x0 -o test test.o
objcopy -O binary test test.bin

Run with:

qemu-system-ppc64 -nographic -bios test.bin

Shows an incorrect SRR0 (points at the li):

SRR0 0000000000000100

With the patch we get the correct SRR0:

SRR0 0000000000000104

Signed-off-by: Anton Blanchard <anton@samba.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
2015-09-20 22:48:39 +02:00
..
aarch64
alpha
arm
cris
i386
m68k
microblaze
mips
mips64
openrisc
ppc
s390x
sh4
sparc
sparc64
tilegx
unicore32
x86_64
elfload.c
errno_defs.h
flat.h
flatload.c
ioctls.h
linux_loop.h
linuxload.c
m68k-sim.c
main.c
Makefile.objs
mmap.c
qemu.h
signal.c
socket.h
strace.c
strace.list
syscall.c
syscall_defs.h
syscall_types.h
target_flat.h
uaccess.c
uname.c
uname.h
vm86.c