qemu/target/arm
Marc Zyngier 6a4ef4e5d1 target/arm: Honor HCR_EL2.TID3 trapping requirements
HCR_EL2.TID3 mandates that access from EL1 to a long list of id
registers traps to EL2, and QEMU has so far ignored this requirement.

This breaks (among other things) KVM guests that have PtrAuth enabled,
while the hypervisor doesn't want to expose the feature to its guest.
To achieve this, KVM traps the ID registers (ID_AA64ISAR1_EL1 in this
case), and masks out the unsupported feature.

QEMU not honoring the trap request means that the guest observes
that the feature is present in the HW, starts using it, and dies
a horrible death when KVM injects an UNDEF, because the feature
*really* isn't supported.

Do the right thing by trapping to EL2 if HCR_EL2.TID3 is set.

Note that this change does not include trapping of the MVFR
registers from AArch32 (they are accessed via the VMRS
instruction and need to be handled in a different way).

Reported-by: Will Deacon <will@kernel.org>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Tested-by: Will Deacon <will@kernel.org>
Message-id: 20191123115618.29230-1-maz@kernel.org
[PMM: added missing accessfn line for ID_AA4PFR2_EL1_RESERVED;
 changed names of access functions to include _tid3]
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-11-26 13:55:37 +00:00
..
a32-uncond.decode target/arm: Convert Unallocated memory hint 2019-09-05 13:23:03 +01:00
a32.decode target/arm: Convert SVC 2019-09-05 13:23:03 +01:00
arch_dump.c target/arm: Add aa{32, 64}_vfp_{dreg, qreg} helpers 2018-01-25 11:45:29 +00:00
arm-powerctl.c target/arm/arm-powerctl: Add new arm_set_cpu_on_and_reset() 2019-02-28 11:03:04 +00:00
arm-powerctl.h target/arm/arm-powerctl: Add new arm_set_cpu_on_and_reset() 2019-02-28 11:03:04 +00:00
arm-semi.c target/arm/arm-semi: Implement SH_EXT_STDOUT_STDERR extension 2019-10-15 18:09:04 +01:00
arm_ldst.h target/arm: fetch code with translator_ld 2019-10-28 15:12:38 +00:00
cpu-param.h tcg: Split out target/arch/cpu-param.h 2019-06-10 07:03:34 -07:00
cpu-qom.h hw/core: Move cpu.c, cpu.h from qom/ to hw/core/ 2019-08-21 13:24:01 +02:00
cpu.c target/arm/kvm: host cpu: Add support for sve<N> properties 2019-11-01 20:40:59 +00:00
cpu.h target/arm: Support EL0 v7m msr/mrs for CONFIG_USER_ONLY 2019-11-19 13:20:28 +00:00
cpu64.c target/arm: Merge arm_cpu_vq_map_next_smaller into sole caller 2019-11-19 13:20:27 +00:00
crypto_helper.c target: Do not include "exec/exec-all.h" if it is not necessary 2018-06-01 14:15:10 +02:00
debug_helper.c target/arm: Move debug routines to debug_helper.c 2019-07-04 17:14:43 +01:00
gdbstub.c Include qemu-common.h exactly where needed 2019-06-12 13:20:20 +02:00
gdbstub64.c Include qemu-common.h exactly where needed 2019-06-12 13:20:20 +02:00
helper-a64.c target/arm: Rebuild hflags at EL changes 2019-10-24 17:16:28 +01:00
helper-a64.h target/arm: Split helper_msr_i_pstate into 3 2019-03-05 15:55:08 +00:00
helper-sve.h target/arm: Rewrite vector gather first-fault loads 2018-10-08 14:55:03 +01:00
helper.c target/arm: Honor HCR_EL2.TID3 trapping requirements 2019-11-26 13:55:37 +00:00
helper.h target/arm: Add HELPER(rebuild_hflags_{a32, a64, m32}) 2019-10-24 17:16:28 +01:00
idau.h qom: make interface types abstract 2018-12-11 15:45:22 -02:00
internals.h target/arm: Split out arm_mmu_idx_el 2019-10-24 17:16:28 +01:00
iwmmxt_helper.c target/arm: Untabify iwmmxt_helper.c 2018-08-24 13:17:48 +01:00
kvm-consts.h arm: add trailing ; after MISMATCH_CHECK 2017-02-01 03:37:18 +02:00
kvm-stub.c Include qemu-common.h exactly where needed 2019-06-12 13:20:20 +02:00
kvm.c target/arm/kvm: scratch vcpu: Preserve input kvm_vcpu_init features 2019-11-01 20:40:59 +00:00
kvm32.c target/arm/kvm: scratch vcpu: Preserve input kvm_vcpu_init features 2019-11-01 20:40:59 +00:00
kvm64.c target/arm/kvm: host cpu: Add support for sve<N> properties 2019-11-01 20:40:59 +00:00
kvm_arm.h target/arm/cpu64: max cpu: Support sve properties with KVM 2019-11-01 20:40:59 +00:00
m_helper.c target/arm: Fix handling of cortex-m FTYPE flag in EXCRET 2019-11-26 13:55:36 +00:00
machine.c target/arm: Rebuild hflags at EL changes 2019-10-24 17:16:28 +01:00
Makefile.objs target/arm: Add skeleton for T16 decodetree 2019-09-05 13:23:03 +01:00
monitor.c target/arm/cpu64: max cpu: Introduce sve<N> properties 2019-11-01 20:40:59 +00:00
neon_helper.c target/arm: Use tcg_gen_abs_i64 and tcg_gen_gvec_abs 2019-05-13 22:52:08 +00:00
op_addsub.h
op_helper.c target/arm: Rebuild hflags at CPSR writes 2019-10-24 17:16:28 +01:00
pauth_helper.c target/arm: Fix output of PAuth Auth 2019-06-13 15:14:03 +01:00
psci.c sysemu: Split sysemu/runstate.h off sysemu/sysemu.h 2019-08-16 13:37:36 +02:00
sve.decode target/arm: SVE brk[ab] merging does not have s bit 2019-01-07 15:23:45 +00:00
sve_helper.c tcg: Introduce set/clear_helper_retaddr 2019-07-14 12:19:00 +02:00
t16.decode target/arm: Convert T16, long branches 2019-09-05 13:23:04 +01:00
t32.decode target/arm: Convert TT 2019-09-05 13:23:03 +01:00
tlb_helper.c target/arm: Move TLB related routines to tlb_helper.c 2019-07-01 17:29:01 +01:00
trace-events trace-events: Shorten file names in comments 2019-03-22 16:18:07 +00:00
translate-a64.c target/arm: Rebuild hflags at MSR writes 2019-10-24 17:16:28 +01:00
translate-a64.h Allow page table bit to swap endianness. 2019-09-04 16:29:18 +01:00
translate-sve.c tcg: TCGMemOp is now accelerator independent MemOp 2019-09-03 08:30:38 -07:00
translate-vfp.inc.c target/arm: Allow reading flags from FPSCR for M-profile 2019-11-01 20:41:00 +00:00
translate.c target/arm: Relax r13 restriction for ldrex/strex for v8.0 2019-11-19 13:20:28 +00:00
translate.h Allow page table bit to swap endianness. 2019-09-04 16:29:18 +01:00
vec_helper.c target/arm: Add helpers for FMLAL 2019-02-28 11:03:05 +00:00
vfp-uncond.decode target/arm: Convert VCVTA/VCVTN/VCVTP/VCVTM to decodetree 2019-06-13 15:14:04 +01:00
vfp.decode target/arm: Use vfp_expand_imm() for AArch32 VFP VMOV_imm 2019-06-17 15:14:19 +01:00
vfp_helper.c target/arm/vfp_helper: Call set_fpscr_to_host before updating to FPSCR 2019-07-08 14:11:31 +01:00