qemu/target-arm
Peter Maydell 7e09797c29 target-arm: Use dedicated CPU state fields for ARM946 access bit registers
The ARM946 model currently uses the c5_data and c5_insn fields in the CPU
state struct to store the contents of its access permission registers.
This is confusing and a good source of bugs because for all the MMU-based
CPUs those fields are fault status and fault address registers, which
behave completely differently; they just happen to use the same cpreg
encoding. Split them out to use their own fields instead.

These registers are only present in PMSAv5 MPU systems (of which the
ARM946 is our only current example); PMSAv6 and PMSAv7 (which we have
no implementations of) handle access permissions differently. We name
the new state fields accordingly.

Note that this change fixes a bug where a data abort or prefetch abort
on the ARM946 would accidentally corrupt the access permission registers
because the interrupt handling code assumed the c5_data and c5_insn
fields were always fault status registers.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
2014-04-17 21:34:04 +01:00
..
arm-semi.c cpu: Move opaque field from CPU_COMMON to CPUState 2014-03-13 19:20:47 +01:00
cpu-qom.h target-arm: A64: Implement DC ZVA 2014-04-17 21:34:04 +01:00
cpu.c target-arm: A64: Correctly fault FP/Neon if CPACR.FPEN set 2014-04-17 21:34:03 +01:00
cpu.h target-arm: Use dedicated CPU state fields for ARM946 access bit registers 2014-04-17 21:34:04 +01:00
cpu64.c target-arm: A64: Implement DC ZVA 2014-04-17 21:34:04 +01:00
crypto_helper.c target-arm: add support for v8 AES instructions 2013-12-17 19:42:25 +00:00
gdbstub.c cpu: Introduce CPUClass::gdb_{read,write}_register() 2013-07-27 00:04:17 +02:00
gdbstub64.c target-arm: Clean up handling of AArch64 PSTATE 2013-12-17 19:42:30 +00:00
helper-a64.c target-arm: A64: Implement FCVTXN 2014-03-17 16:31:53 +00:00
helper-a64.h target-arm: A64: Implement FCVTXN 2014-03-17 16:31:53 +00:00
helper.c target-arm: Use dedicated CPU state fields for ARM946 access bit registers 2014-04-17 21:34:04 +01:00
helper.h target-arm: A64: Implement DC ZVA 2014-04-17 21:34:04 +01:00
internals.h target-arm: A64: Correctly fault FP/Neon if CPACR.FPEN set 2014-04-17 21:34:03 +01:00
iwmmxt_helper.c misc: Use new rotate functions 2013-09-25 21:23:05 +02:00
kvm-consts.h target-arm/kvm-consts.h: Define QEMU constants for known KVM CPUs 2014-02-20 10:35:50 +00:00
kvm-stub.c target-arm: Initialize cpreg list from KVM when using KVM 2013-06-25 18:16:10 +01:00
kvm.c arm: vgic device control api support 2014-02-26 17:20:00 +00:00
kvm32.c target-arm: Split out private-to-target functions into internals.h 2014-04-17 21:34:03 +01:00
kvm64.c target-arm: Add minimal KVM AArch64 support 2013-12-17 19:42:30 +00:00
kvm_arm.h arm: vgic device control api support 2014-02-26 17:20:00 +00:00
machine.c target-arm: Define exception record for AArch64 exceptions 2014-04-17 21:34:03 +01:00
Makefile.objs target-arm: A64: add stubs for a64 specific helpers 2013-12-17 19:42:32 +00:00
neon_helper.c target-arm: A64: Add saturating accumulate ops (USQADD/SUQADD) 2014-03-18 23:10:06 +00:00
op_addsub.h Correct spelling of licensed 2011-07-23 11:26:12 -05:00
op_helper.c target-arm: Add support for generating exceptions with syndrome information 2014-04-17 21:34:03 +01:00
translate-a64.c target-arm: A64: Implement DC ZVA 2014-04-17 21:34:04 +01:00
translate.c target-arm: Fix VFP enables for AArch32 EL0 under AArch64 EL1 2014-04-17 21:34:03 +01:00
translate.h target-arm: A64: Add assertion that FP access was checked 2014-04-17 21:34:03 +01:00