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a59a293126
With sparc64 we need not distinguish between registers that can hold 32-bit values and those that can hold 64-bit values. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
21 lines
446 B
C
21 lines
446 B
C
/* SPDX-License-Identifier: MIT */
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/*
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* Define Sparc target-specific operand constraints.
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* Copyright (c) 2021 Linaro
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*/
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/*
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* Define constraint letters for register sets:
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* REGS(letter, register_mask)
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*/
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REGS('r', ALL_GENERAL_REGS)
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REGS('s', ALL_QLDST_REGS)
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/*
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* Define constraint letters for constants:
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* CONST(letter, TCG_CT_CONST_* bit set)
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*/
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CONST('I', TCG_CT_CONST_S11)
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CONST('J', TCG_CT_CONST_S13)
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CONST('Z', TCG_CT_CONST_ZERO)
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