mirror of
https://gitlab.com/qemu-project/qemu
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d0180f0acb
In the ACPI specification [1], the 'unarmed' bit is set when a device
cannot accept a persistent write. This means that when a memdev is
read-only, the 'unarmed' flag must be turned on. The logic is correct,
just changing the error message.
[1] ACPI NFIT NVDIMM Region Mapping Structure "NVDIMM State Flags" Bit 3
Fixes: dbd730e859
("nvdimm: check -object memory-backend-file, readonly=on option")
Signed-off-by: Julia Suvorova <jusual@redhat.com>
Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com>
Reviewed-by: Pankaj Gupta <pankaj.gupta@amd.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Acked-by: David Hildenbrand <david@redhat.com>
Message-Id: <20221023195812.15523-1-jusual@redhat.com>
Signed-off-by: David Hildenbrand <david@redhat.com>
282 lines
8.3 KiB
C
282 lines
8.3 KiB
C
/*
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* Non-Volatile Dual In-line Memory Module Virtualization Implementation
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*
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* Copyright(C) 2015 Intel Corporation.
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*
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* Author:
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* Xiao Guangrong <guangrong.xiao@linux.intel.com>
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*
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* Currently, it only supports PMEM Virtualization.
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2.1 of the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, see <http://www.gnu.org/licenses/>
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*/
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#include "qemu/osdep.h"
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#include "qemu/module.h"
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#include "qemu/pmem.h"
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#include "qapi/error.h"
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#include "qapi/visitor.h"
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#include "hw/mem/nvdimm.h"
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#include "hw/qdev-properties.h"
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#include "hw/mem/memory-device.h"
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#include "sysemu/hostmem.h"
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static void nvdimm_get_label_size(Object *obj, Visitor *v, const char *name,
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void *opaque, Error **errp)
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{
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NVDIMMDevice *nvdimm = NVDIMM(obj);
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uint64_t value = nvdimm->label_size;
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visit_type_size(v, name, &value, errp);
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}
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static void nvdimm_set_label_size(Object *obj, Visitor *v, const char *name,
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void *opaque, Error **errp)
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{
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NVDIMMDevice *nvdimm = NVDIMM(obj);
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uint64_t value;
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if (nvdimm->nvdimm_mr) {
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error_setg(errp, "cannot change property value");
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return;
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}
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if (!visit_type_size(v, name, &value, errp)) {
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return;
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}
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if (value < MIN_NAMESPACE_LABEL_SIZE) {
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error_setg(errp, "Property '%s.%s' (0x%" PRIx64 ") is required"
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" at least 0x%lx", object_get_typename(obj), name, value,
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MIN_NAMESPACE_LABEL_SIZE);
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return;
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}
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nvdimm->label_size = value;
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}
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static void nvdimm_get_uuid(Object *obj, Visitor *v, const char *name,
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void *opaque, Error **errp)
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{
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NVDIMMDevice *nvdimm = NVDIMM(obj);
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char *value = NULL;
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value = qemu_uuid_unparse_strdup(&nvdimm->uuid);
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visit_type_str(v, name, &value, errp);
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g_free(value);
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}
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static void nvdimm_set_uuid(Object *obj, Visitor *v, const char *name,
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void *opaque, Error **errp)
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{
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NVDIMMDevice *nvdimm = NVDIMM(obj);
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char *value;
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if (!visit_type_str(v, name, &value, errp)) {
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return;
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}
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if (qemu_uuid_parse(value, &nvdimm->uuid) != 0) {
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error_setg(errp, "Property '%s.%s' has invalid value",
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object_get_typename(obj), name);
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}
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g_free(value);
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}
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static void nvdimm_init(Object *obj)
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{
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object_property_add(obj, NVDIMM_LABEL_SIZE_PROP, "int",
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nvdimm_get_label_size, nvdimm_set_label_size, NULL,
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NULL);
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object_property_add(obj, NVDIMM_UUID_PROP, "QemuUUID", nvdimm_get_uuid,
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nvdimm_set_uuid, NULL, NULL);
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}
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static void nvdimm_finalize(Object *obj)
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{
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NVDIMMDevice *nvdimm = NVDIMM(obj);
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g_free(nvdimm->nvdimm_mr);
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}
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static void nvdimm_prepare_memory_region(NVDIMMDevice *nvdimm, Error **errp)
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{
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PCDIMMDevice *dimm = PC_DIMM(nvdimm);
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uint64_t align, pmem_size, size;
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MemoryRegion *mr;
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g_assert(!nvdimm->nvdimm_mr);
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if (!dimm->hostmem) {
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error_setg(errp, "'" PC_DIMM_MEMDEV_PROP "' property must be set");
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return;
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}
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mr = host_memory_backend_get_memory(dimm->hostmem);
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align = memory_region_get_alignment(mr);
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size = memory_region_size(mr);
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pmem_size = size - nvdimm->label_size;
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nvdimm->label_data = memory_region_get_ram_ptr(mr) + pmem_size;
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pmem_size = QEMU_ALIGN_DOWN(pmem_size, align);
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if (size <= nvdimm->label_size || !pmem_size) {
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HostMemoryBackend *hostmem = dimm->hostmem;
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error_setg(errp, "the size of memdev %s (0x%" PRIx64 ") is too "
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"small to contain nvdimm label (0x%" PRIx64 ") and "
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"aligned PMEM (0x%" PRIx64 ")",
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object_get_canonical_path_component(OBJECT(hostmem)),
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memory_region_size(mr), nvdimm->label_size, align);
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return;
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}
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if (!nvdimm->unarmed && memory_region_is_rom(mr)) {
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HostMemoryBackend *hostmem = dimm->hostmem;
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error_setg(errp, "'unarmed' property must be 'on' since memdev %s "
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"is read-only",
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object_get_canonical_path_component(OBJECT(hostmem)));
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return;
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}
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nvdimm->nvdimm_mr = g_new(MemoryRegion, 1);
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memory_region_init_alias(nvdimm->nvdimm_mr, OBJECT(dimm),
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"nvdimm-memory", mr, 0, pmem_size);
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memory_region_set_nonvolatile(nvdimm->nvdimm_mr, true);
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nvdimm->nvdimm_mr->align = align;
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}
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static MemoryRegion *nvdimm_md_get_memory_region(MemoryDeviceState *md,
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Error **errp)
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{
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NVDIMMDevice *nvdimm = NVDIMM(md);
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Error *local_err = NULL;
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if (!nvdimm->nvdimm_mr) {
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nvdimm_prepare_memory_region(nvdimm, &local_err);
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if (local_err) {
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error_propagate(errp, local_err);
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return NULL;
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}
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}
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return nvdimm->nvdimm_mr;
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}
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static void nvdimm_realize(PCDIMMDevice *dimm, Error **errp)
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{
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NVDIMMDevice *nvdimm = NVDIMM(dimm);
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NVDIMMClass *ndc = NVDIMM_GET_CLASS(nvdimm);
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if (!nvdimm->nvdimm_mr) {
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nvdimm_prepare_memory_region(nvdimm, errp);
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}
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if (ndc->realize) {
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ndc->realize(nvdimm, errp);
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}
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}
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static void nvdimm_unrealize(PCDIMMDevice *dimm)
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{
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NVDIMMDevice *nvdimm = NVDIMM(dimm);
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NVDIMMClass *ndc = NVDIMM_GET_CLASS(nvdimm);
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if (ndc->unrealize) {
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ndc->unrealize(nvdimm);
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}
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}
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/*
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* the caller should check the input parameters before calling
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* label read/write functions.
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*/
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static void nvdimm_validate_rw_label_data(NVDIMMDevice *nvdimm, uint64_t size,
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uint64_t offset)
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{
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assert((nvdimm->label_size >= size + offset) && (offset + size > offset));
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}
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static void nvdimm_read_label_data(NVDIMMDevice *nvdimm, void *buf,
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uint64_t size, uint64_t offset)
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{
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nvdimm_validate_rw_label_data(nvdimm, size, offset);
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memcpy(buf, nvdimm->label_data + offset, size);
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}
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static void nvdimm_write_label_data(NVDIMMDevice *nvdimm, const void *buf,
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uint64_t size, uint64_t offset)
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{
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MemoryRegion *mr;
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PCDIMMDevice *dimm = PC_DIMM(nvdimm);
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bool is_pmem = object_property_get_bool(OBJECT(dimm->hostmem),
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"pmem", NULL);
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uint64_t backend_offset;
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nvdimm_validate_rw_label_data(nvdimm, size, offset);
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if (!is_pmem) {
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memcpy(nvdimm->label_data + offset, buf, size);
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} else {
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pmem_memcpy_persist(nvdimm->label_data + offset, buf, size);
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}
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mr = host_memory_backend_get_memory(dimm->hostmem);
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backend_offset = memory_region_size(mr) - nvdimm->label_size + offset;
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memory_region_set_dirty(mr, backend_offset, size);
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}
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static Property nvdimm_properties[] = {
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DEFINE_PROP_BOOL(NVDIMM_UNARMED_PROP, NVDIMMDevice, unarmed, false),
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DEFINE_PROP_END_OF_LIST(),
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};
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static void nvdimm_class_init(ObjectClass *oc, void *data)
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{
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PCDIMMDeviceClass *ddc = PC_DIMM_CLASS(oc);
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MemoryDeviceClass *mdc = MEMORY_DEVICE_CLASS(oc);
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NVDIMMClass *nvc = NVDIMM_CLASS(oc);
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DeviceClass *dc = DEVICE_CLASS(oc);
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ddc->realize = nvdimm_realize;
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ddc->unrealize = nvdimm_unrealize;
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mdc->get_memory_region = nvdimm_md_get_memory_region;
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device_class_set_props(dc, nvdimm_properties);
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nvc->read_label_data = nvdimm_read_label_data;
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nvc->write_label_data = nvdimm_write_label_data;
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set_bit(DEVICE_CATEGORY_STORAGE, dc->categories);
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}
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static const TypeInfo nvdimm_info = {
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.name = TYPE_NVDIMM,
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.parent = TYPE_PC_DIMM,
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.class_size = sizeof(NVDIMMClass),
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.class_init = nvdimm_class_init,
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.instance_size = sizeof(NVDIMMDevice),
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.instance_init = nvdimm_init,
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.instance_finalize = nvdimm_finalize,
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};
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static void nvdimm_register_types(void)
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{
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type_register_static(&nvdimm_info);
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}
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type_init(nvdimm_register_types)
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