qemu/target/m68k
Laurent Vivier 727d937b59 target-m68k: increment/decrement with SP
On 680x0 family only.

Address Register indirect With postincrement:

When using the stack pointer (A7) with byte size data, the register
is incremented by two.

Address Register indirect With predecrement:

When using the stack pointer (A7) with byte size data, the register
is decremented by two.

Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Reviewed-by: Thomas Huth <huth@tuxfamily.org>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Message-Id: <1484332593-16782-6-git-send-email-laurent@vivier.eu>
2017-01-14 10:06:21 +01:00
..
cpu-qom.h Move target-* CPU file into a target/ folder 2016-12-20 21:52:12 +01:00
cpu.c Move target-* CPU file into a target/ folder 2016-12-20 21:52:12 +01:00
cpu.h target-m68k: Implement bitfield ops for memory 2017-01-14 10:06:21 +01:00
gdbstub.c Move target-* CPU file into a target/ folder 2016-12-20 21:52:12 +01:00
helper.c target-m68k: Inline shifts 2016-12-27 18:28:40 +01:00
helper.h target-m68k: Implement bfffo 2017-01-14 10:06:21 +01:00
m68k-semi.c Move target-* CPU file into a target/ folder 2016-12-20 21:52:12 +01:00
Makefile.objs Move target-* CPU file into a target/ folder 2016-12-20 21:52:12 +01:00
op_helper.c target-m68k: Implement bfffo 2017-01-14 10:06:21 +01:00
qregs.def target-m68k: add 680x0 divu/divs variants 2016-12-27 18:16:42 +01:00
translate.c target-m68k: increment/decrement with SP 2017-01-14 10:06:21 +01:00