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![Corey Minyard](/assets/img/avatar_default.png)
Pass in the CRS so that it can be set to the SMBus for IPMI later. Cc: Michael S. Tsirkin <mst@redhat.com> Cc: Igor Mammedov <imammedo@redhat.com> Signed-off-by: Corey Minyard <cminyard@mvista.com>
108 lines
3.6 KiB
C
108 lines
3.6 KiB
C
/*
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* IPMI ACPI firmware handling
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*
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* Copyright (c) 2015,2016 Corey Minyard, MontaVista Software, LLC
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*
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* This work is licensed under the terms of the GNU GPL, version 2 or later.
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* See the COPYING file in the top-level directory.
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*/
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#include "qemu/osdep.h"
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#include "hw/ipmi/ipmi.h"
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#include "hw/acpi/aml-build.h"
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#include "hw/acpi/acpi.h"
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#include "hw/acpi/ipmi.h"
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static Aml *aml_ipmi_crs(IPMIFwInfo *info, const char *resource)
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{
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Aml *crs = aml_resource_template();
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/*
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* The base address is fixed and cannot change. That may be different
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* if someone does PCI, but we aren't there yet.
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*/
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switch (info->memspace) {
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case IPMI_MEMSPACE_IO:
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aml_append(crs, aml_io(AML_DECODE16, info->base_address,
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info->base_address + info->register_length - 1,
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info->register_spacing, info->register_length));
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break;
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case IPMI_MEMSPACE_MEM32:
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aml_append(crs,
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aml_dword_memory(AML_POS_DECODE,
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AML_MIN_FIXED, AML_MAX_FIXED,
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AML_NON_CACHEABLE, AML_READ_WRITE,
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0xffffffff,
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info->base_address,
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info->base_address + info->register_length - 1,
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info->register_spacing, info->register_length));
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break;
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case IPMI_MEMSPACE_MEM64:
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aml_append(crs,
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aml_qword_memory(AML_POS_DECODE,
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AML_MIN_FIXED, AML_MAX_FIXED,
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AML_NON_CACHEABLE, AML_READ_WRITE,
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0xffffffffffffffffULL,
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info->base_address,
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info->base_address + info->register_length - 1,
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info->register_spacing, info->register_length));
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break;
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case IPMI_MEMSPACE_SMBUS:
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aml_append(crs, aml_i2c_serial_bus_device(info->base_address,
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resource));
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break;
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default:
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abort();
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}
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if (info->interrupt_number) {
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aml_append(crs, aml_irq_no_flags(info->interrupt_number));
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}
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return crs;
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}
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static Aml *aml_ipmi_device(IPMIFwInfo *info, const char *resource)
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{
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Aml *dev;
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uint16_t version = ((info->ipmi_spec_major_revision << 8)
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| (info->ipmi_spec_minor_revision << 4));
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assert(info->ipmi_spec_minor_revision <= 15);
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dev = aml_device("MI%d", info->uuid);
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aml_append(dev, aml_name_decl("_HID", aml_eisaid("IPI0001")));
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aml_append(dev, aml_name_decl("_STR", aml_string("ipmi_%s",
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info->interface_name)));
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aml_append(dev, aml_name_decl("_UID", aml_int(info->uuid)));
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aml_append(dev, aml_name_decl("_CRS", aml_ipmi_crs(info, resource)));
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aml_append(dev, aml_name_decl("_IFT", aml_int(info->interface_type)));
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aml_append(dev, aml_name_decl("_SRV", aml_int(version)));
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return dev;
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}
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void build_acpi_ipmi_devices(Aml *scope, BusState *bus, const char *resource)
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{
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BusChild *kid;
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QTAILQ_FOREACH(kid, &bus->children, sibling) {
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IPMIInterface *ii;
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IPMIInterfaceClass *iic;
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IPMIFwInfo info;
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Object *obj = object_dynamic_cast(OBJECT(kid->child),
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TYPE_IPMI_INTERFACE);
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if (!obj) {
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continue;
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}
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ii = IPMI_INTERFACE(obj);
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iic = IPMI_INTERFACE_GET_CLASS(obj);
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memset(&info, 0, sizeof(info));
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iic->get_fwinfo(ii, &info);
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aml_append(scope, aml_ipmi_device(&info, resource));
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}
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}
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