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https://gitlab.com/qemu-project/qemu
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14a10fc399
Commit c643bed99
moved qemu_init_vcpu() calls to common CPUState code.
This causes x86 cpu-add to fail with "KVM: setting VAPIC address failed".
The reason for the failure is that CPUClass::kvm_fd is not yet
initialized in the following call graph:
->x86_cpu_realizefn
->x86_cpu_apic_realize
->qdev_init
->device_set_realized
->device_reset (hotplugged == 1)
->apic_reset_common
->vapic_base_update
->kvm_apic_vapic_base_update
This causes attempted KVM vCPU ioctls to fail.
By contrast, in the non-hotplug case the APIC is reset much later, when
the vCPU is already initialized.
As a quick and safe solution, move the qemu_init_vcpu() call back into
the targets' realize functions.
Reported-by: Chen Fan <chen.fan.fnst@cn.fujitsu.com>
Acked-by: Igor Mammedov <imammedo@redhat.com> (for i386)
Tested-by: Jia Liu <proljc@gmail.com> (for openrisc)
Signed-off-by: Andreas Färber <afaerber@suse.de>
116 lines
2.9 KiB
C
116 lines
2.9 KiB
C
/*
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* QEMU LatticeMico32 CPU
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*
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* Copyright (c) 2012 SUSE LINUX Products GmbH
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2.1 of the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, see
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* <http://www.gnu.org/licenses/lgpl-2.1.html>
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*/
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#include "cpu.h"
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#include "qemu-common.h"
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static void lm32_cpu_set_pc(CPUState *cs, vaddr value)
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{
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LM32CPU *cpu = LM32_CPU(cs);
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cpu->env.pc = value;
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}
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/* CPUClass::reset() */
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static void lm32_cpu_reset(CPUState *s)
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{
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LM32CPU *cpu = LM32_CPU(s);
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LM32CPUClass *lcc = LM32_CPU_GET_CLASS(cpu);
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CPULM32State *env = &cpu->env;
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lcc->parent_reset(s);
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/* reset cpu state */
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memset(env, 0, offsetof(CPULM32State, breakpoints));
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tlb_flush(env, 1);
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}
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static void lm32_cpu_realizefn(DeviceState *dev, Error **errp)
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{
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CPUState *cs = CPU(dev);
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LM32CPUClass *lcc = LM32_CPU_GET_CLASS(dev);
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cpu_reset(cs);
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qemu_init_vcpu(cs);
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lcc->parent_realize(dev, errp);
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}
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static void lm32_cpu_initfn(Object *obj)
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{
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CPUState *cs = CPU(obj);
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LM32CPU *cpu = LM32_CPU(obj);
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CPULM32State *env = &cpu->env;
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static bool tcg_initialized;
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cs->env_ptr = env;
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cpu_exec_init(env);
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env->flags = 0;
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if (tcg_enabled() && !tcg_initialized) {
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tcg_initialized = true;
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lm32_translate_init();
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}
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}
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static void lm32_cpu_class_init(ObjectClass *oc, void *data)
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{
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LM32CPUClass *lcc = LM32_CPU_CLASS(oc);
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CPUClass *cc = CPU_CLASS(oc);
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DeviceClass *dc = DEVICE_CLASS(oc);
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lcc->parent_realize = dc->realize;
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dc->realize = lm32_cpu_realizefn;
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lcc->parent_reset = cc->reset;
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cc->reset = lm32_cpu_reset;
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cc->do_interrupt = lm32_cpu_do_interrupt;
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cc->dump_state = lm32_cpu_dump_state;
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cc->set_pc = lm32_cpu_set_pc;
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cc->gdb_read_register = lm32_cpu_gdb_read_register;
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cc->gdb_write_register = lm32_cpu_gdb_write_register;
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#ifndef CONFIG_USER_ONLY
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cc->get_phys_page_debug = lm32_cpu_get_phys_page_debug;
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cc->vmsd = &vmstate_lm32_cpu;
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#endif
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cc->gdb_num_core_regs = 32 + 7;
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}
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static const TypeInfo lm32_cpu_type_info = {
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.name = TYPE_LM32_CPU,
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.parent = TYPE_CPU,
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.instance_size = sizeof(LM32CPU),
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.instance_init = lm32_cpu_initfn,
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.abstract = false,
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.class_size = sizeof(LM32CPUClass),
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.class_init = lm32_cpu_class_init,
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};
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static void lm32_cpu_register_types(void)
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{
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type_register_static(&lm32_cpu_type_info);
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}
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type_init(lm32_cpu_register_types)
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