qemu/hw/watchdog
Cédric Le Goater 854123bf8d wdt: Add Aspeed watchdog device model
The Aspeed SoC includes a set of watchdog timers using 32-bit
decrement counters, which can be based either on the APB clock or
a 1 MHz clock.

The watchdog timer is designed to prevent system deadlock and, in
general, it should be restarted before timeout. When a timeout occurs,
different types of signals can be generated, ARM reset, SOC reset,
System reset, CPU Interrupt, external signal or boot from alternate
block. The current model only performs the system reset function as
this is used by U-Boot and Linux.

Signed-off-by: Joel Stanley <joel@jms.id.au>
Message-id: 1485452251-1593-2-git-send-email-clg@kaod.org
[clg: - fixed compile breakage
      - fixed io region size
      - added watchdog_perform_action() on timer expiry
      - wrote a commit log
      - merged fixes from Andrew Jeffery to scale the reload value ]
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2017-02-07 18:29:59 +00:00
..
Makefile.objs wdt: Add Aspeed watchdog device model 2017-02-07 18:29:59 +00:00
watchdog.c nmi: remove x86 specific nmi handling 2016-05-23 16:53:46 +02:00
wdt_aspeed.c wdt: Add Aspeed watchdog device model 2017-02-07 18:29:59 +00:00
wdt_diag288.c hw: explicitly include qemu/log.h 2016-05-19 16:42:29 +02:00
wdt_i6300esb.c watchdog: 6300esb: add exit function 2016-12-22 16:00:23 +01:00
wdt_ib700.c Replaced get_tick_per_sec() by NANOSECONDS_PER_SECOND 2016-03-22 22:20:17 +01:00