Tong Ho 68fbcc344e hw/nvram: Introduce Xilinx eFuse QOM ... This introduces the QOM for Xilinx eFuse, an one-time field-programmable storage bit array. The actual mmio interface to the array varies by device families and will be provided in different change-sets. Co-authored-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Co-authored-by: Sai Pavan Boddu <sai.pavan.boddu@xilinx.com> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Signed-off-by: Sai Pavan Boddu <sai.pavan.boddu@xilinx.com> Signed-off-by: Tong Ho <tong.ho@xilinx.com> Message-id: 20210917052400.1249094-2-tong.ho@xilinx.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>		2021-09-30 13:42:09 +01:00
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authz
block	hw/nvme: fix verification of select field in namespace attachment	2021-09-24 08:43:52 +02:00
chardev
crypto
disas
exec	include/exec: Move cpu_signal_handler declaration	2021-09-21 19:36:44 -07:00
fpu
hw	hw/nvram: Introduce Xilinx eFuse QOM	2021-09-30 13:42:09 +01:00
io
libdecnumber
migration
monitor
net
qapi
qemu
qom
scsi
semihosting
standard-headers
sysemu	arm/hvf: Add a WFI handler	2021-09-21 16:28:26 +01:00
tcg
ui
user
elf.h
glib-compat.h
qemu-common.h
qemu-io.h
trace-tcg.h