qemu/fpu
Peter Maydell 67d43538ae softfloat: Support halving the result of muladd operation
The ARMv8 instruction set includes a fused floating point
reciprocal square root step instruction which demands an
"(x * y + z) / 2" fused operation. Support this by adding
a flag to the softfloat muladd operations which requests
that the result is halved before rounding.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <rth@twiddle.net>
2014-02-20 10:35:50 +00:00
..
softfloat-macros.h softfloat: Fix shift128Right for shift counts 64..127 2013-06-10 11:36:12 -05:00
softfloat-specialize.h softfloat: implement fused multiply-add NaN propagation for MIPS 2012-10-31 22:20:45 +01:00
softfloat.c softfloat: Support halving the result of muladd operation 2014-02-20 10:35:50 +00:00