qemu/target
Peter Maydell 62593718d7 target/arm: Split M profile MNegPri mmu index into user and priv
For M profile, we currently have an mmu index MNegPri for
"requested execution priority negative". This fails to
distinguish "requested execution priority negative, privileged"
from "requested execution priority negative, usermode", but
the two can return different results for MPU lookups. Fix this
by splitting MNegPri into MNegPriPriv and MNegPriUser, and
similarly for the Secure equivalent MSNegPri.

This takes us from 6 M profile MMU modes to 8, which means
we need to bump NB_MMU_MODES; this is OK since the point
where we are forced to reduce TLB sizes is 9 MMU modes.

(It would in theory be possible to stick with 6 MMU indexes:
{mpu-disabled,user,privileged} x {secure,nonsecure} since
in the MPU-disabled case the result of an MPU lookup is
always the same for both user and privileged code. However
we would then need to rework the TB flags handling to put
user/priv into the TB flags separately from the mmuidx.
Adding an extra couple of mmu indexes is simpler.)

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 1512153879-5291-5-git-send-email-peter.maydell@linaro.org
2017-12-13 17:59:23 +00:00
..
alpha x86/cpu/numa queue, 2017-10-27 2017-10-30 10:11:22 +00:00
arm target/arm: Split M profile MNegPri mmu index into user and priv 2017-12-13 17:59:23 +00:00
cris x86/cpu/numa queue, 2017-10-27 2017-10-30 10:11:22 +00:00
hppa Capstone disassembler 2017-10-27 08:04:51 +01:00
i386 Miscellaneous bugfixes 2017-11-16 14:42:54 +00:00
lm32 x86/cpu/numa queue, 2017-10-27 2017-10-30 10:11:22 +00:00
m68k x86/cpu/numa queue, 2017-10-27 2017-10-30 10:11:22 +00:00
microblaze Capstone disassembler 2017-10-27 08:04:51 +01:00
mips x86/cpu/numa queue, 2017-10-27 2017-10-30 10:11:22 +00:00
moxie moxie: cleanup cpu type name composition 2017-10-27 16:03:54 +02:00
nios2 Capstone disassembler 2017-10-27 08:04:51 +01:00
openrisc x86/cpu/numa queue, 2017-10-27 2017-10-30 10:11:22 +00:00
ppc target/ppc: Fix system lockups caused by interrupt_request state corruption 2017-12-05 12:28:42 +11:00
s390x s390x/tcg: fix DIAG 308 with > 1 VCPU (MTTCG) 2017-11-20 09:31:46 +01:00
sh4 x86/cpu/numa queue, 2017-10-27 2017-10-30 10:11:22 +00:00
sparc linux-user/sparc: Put address for data faults where linux-user expects it 2017-11-07 21:59:18 +02:00
tilegx tcg: Initialize cpu_env generically 2017-10-24 13:53:42 -07:00
tricore x86/cpu/numa queue, 2017-10-27 2017-10-30 10:11:22 +00:00
unicore32 x86/cpu/numa queue, 2017-10-27 2017-10-30 10:11:22 +00:00
xtensa x86/cpu/numa queue, 2017-10-27 2017-10-30 10:11:22 +00:00