qemu/target
Richard Henderson 61766fe9e2 target-hppa: Add framework and enable compilation
This is just about the minimum required to enable compilation
without actually executing any instructions.  This contains the
HPPACPU structure and the required callbacks, the gdbstub, the
basic translation loop, and a translate_one function that always
results in an illegal instruction.

Signed-off-by: Richard Henderson <rth@twiddle.net>
2017-01-23 09:52:40 -08:00
..
alpha cputlb: drop flush_global flag from tlb_flush 2017-01-13 14:24:37 +00:00
arm target-arm: Enable EL2 feature bit on A53 and A57 2017-01-20 11:15:10 +00:00
cris qom/cpu: move tlb_flush to cpu_common_reset 2017-01-13 14:24:31 +00:00
hppa target-hppa: Add framework and enable compilation 2017-01-23 09:52:40 -08:00
i386 This is the same as the v3 posted except a re-base and a few extra signoffs 2017-01-16 18:23:02 +00:00
lm32 qom/cpu: move tlb_flush to cpu_common_reset 2017-01-13 14:24:31 +00:00
m68k This is the same as the v3 posted except a re-base and a few extra signoffs 2017-01-16 18:23:02 +00:00
microblaze cputlb: drop flush_global flag from tlb_flush 2017-01-13 14:24:37 +00:00
mips cputlb: drop flush_global flag from tlb_flush 2017-01-13 14:24:37 +00:00
moxie qom/cpu: move tlb_flush to cpu_common_reset 2017-01-13 14:24:31 +00:00
openrisc cputlb: drop flush_global flag from tlb_flush 2017-01-13 14:24:37 +00:00
ppc This is the same as the v3 posted except a re-base and a few extra signoffs 2017-01-16 18:23:02 +00:00
s390x s390x/pci: optimize calling s390_get_phb() 2017-01-20 10:01:59 +01:00
sh4 cputlb: drop flush_global flag from tlb_flush 2017-01-13 14:24:37 +00:00
sparc target-sparc: add ST_BLKINIT_ ASIs for UA2005+ CPUs 2017-01-18 22:03:44 +01:00
tilegx qom/cpu: move tlb_flush to cpu_common_reset 2017-01-13 14:24:31 +00:00
tricore qom/cpu: move tlb_flush to cpu_common_reset 2017-01-13 14:24:31 +00:00
unicore32 cputlb: drop flush_global flag from tlb_flush 2017-01-13 14:24:37 +00:00
xtensa cputlb: drop flush_global flag from tlb_flush 2017-01-13 14:24:37 +00:00