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c888f7e0fd
GDB's remote protocol requires M-profile cores to use the feature name 'org.gnu.gdb.arm.m-profile' instead of the 'org.gnu.gdb.arm.core' feature used for A- and R-profile cores. We weren't doing this, which meant GDB treated our M-profile cores like A-profile ones. This mostly doesn't matter, but for instance means that it doesn't correctly handle backtraces where an M-profile exception frame is involved. Ship a copy of GDB's arm-m-profile.xml and use it on the M-profile cores. The integer registers have the same offsets as the arm-core.xml, but register 25 is the M-profile XPSR rather than the A-profile CPSR, so we need to update arm_cpu_gdb_read_register() and arm_cpu_gdb_write_register() to handle XSPR reads and writes. Fixes: https://bugs.launchpad.net/qemu/+bug/1877136 Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20200507134755.13997-1-peter.maydell@linaro.org
27 lines
968 B
XML
27 lines
968 B
XML
<?xml version="1.0"?>
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<!-- Copyright (C) 2010-2020 Free Software Foundation, Inc.
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Copying and distribution of this file, with or without modification,
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are permitted in any medium without royalty provided the copyright
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notice and this notice are preserved. -->
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<!DOCTYPE feature SYSTEM "gdb-target.dtd">
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<feature name="org.gnu.gdb.arm.m-profile">
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<reg name="r0" bitsize="32"/>
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<reg name="r1" bitsize="32"/>
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<reg name="r2" bitsize="32"/>
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<reg name="r3" bitsize="32"/>
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<reg name="r4" bitsize="32"/>
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<reg name="r5" bitsize="32"/>
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<reg name="r6" bitsize="32"/>
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<reg name="r7" bitsize="32"/>
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<reg name="r8" bitsize="32"/>
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<reg name="r9" bitsize="32"/>
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<reg name="r10" bitsize="32"/>
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<reg name="r11" bitsize="32"/>
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<reg name="r12" bitsize="32"/>
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<reg name="sp" bitsize="32" type="data_ptr"/>
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<reg name="lr" bitsize="32"/>
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<reg name="pc" bitsize="32" type="code_ptr"/>
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<reg name="xpsr" bitsize="32" regnum="25"/>
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</feature>
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