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![Markus Armbruster](/assets/img/avatar_default.png)
Committing to the current --preconfig / exit-preconfig interface
before it has seen any use is premature. Mark both as experimental,
the former in documentation, the latter by renaming it to
x-exit-preconfig.
See the previous commit for more detailed rationale.
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Message-Id: <20180705091402.26244-3-armbru@redhat.com>
Reviewed-by: Eric Blake <eblake@redhat.com>
Acked-by: Eduardo Habkost <ehabkost@redhat.com>
Acked-by: Igor Mammedov <imammedo@redhat.com>
[Straightforward conflict with commit 514337c142
resolved]
409 lines
14 KiB
Plaintext
409 lines
14 KiB
Plaintext
@node Implementation notes
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@appendix Implementation notes
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@menu
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* CPU emulation::
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* Translator Internals::
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* QEMU compared to other emulators::
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* Managed start up options::
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* Bibliography::
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@end menu
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@node CPU emulation
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@section CPU emulation
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@menu
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* x86:: x86 and x86-64 emulation
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* ARM:: ARM emulation
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* MIPS:: MIPS emulation
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* PPC:: PowerPC emulation
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* SPARC:: Sparc32 and Sparc64 emulation
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* Xtensa:: Xtensa emulation
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@end menu
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@node x86
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@subsection x86 and x86-64 emulation
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QEMU x86 target features:
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@itemize
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@item The virtual x86 CPU supports 16 bit and 32 bit addressing with segmentation.
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LDT/GDT and IDT are emulated. VM86 mode is also supported to run
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DOSEMU. There is some support for MMX/3DNow!, SSE, SSE2, SSE3, SSSE3,
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and SSE4 as well as x86-64 SVM.
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@item Support of host page sizes bigger than 4KB in user mode emulation.
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@item QEMU can emulate itself on x86.
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@item An extensive Linux x86 CPU test program is included @file{tests/test-i386}.
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It can be used to test other x86 virtual CPUs.
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@end itemize
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Current QEMU limitations:
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@itemize
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@item Limited x86-64 support.
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@item IPC syscalls are missing.
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@item The x86 segment limits and access rights are not tested at every
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memory access (yet). Hopefully, very few OSes seem to rely on that for
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normal use.
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@end itemize
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@node ARM
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@subsection ARM emulation
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@itemize
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@item Full ARM 7 user emulation.
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@item NWFPE FPU support included in user Linux emulation.
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@item Can run most ARM Linux binaries.
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@end itemize
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@node MIPS
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@subsection MIPS emulation
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@itemize
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@item The system emulation allows full MIPS32/MIPS64 Release 2 emulation,
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including privileged instructions, FPU and MMU, in both little and big
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endian modes.
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@item The Linux userland emulation can run many 32 bit MIPS Linux binaries.
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@end itemize
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Current QEMU limitations:
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@itemize
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@item Self-modifying code is not always handled correctly.
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@item 64 bit userland emulation is not implemented.
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@item The system emulation is not complete enough to run real firmware.
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@item The watchpoint debug facility is not implemented.
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@end itemize
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@node PPC
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@subsection PowerPC emulation
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@itemize
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@item Full PowerPC 32 bit emulation, including privileged instructions,
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FPU and MMU.
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@item Can run most PowerPC Linux binaries.
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@end itemize
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@node SPARC
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@subsection Sparc32 and Sparc64 emulation
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@itemize
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@item Full SPARC V8 emulation, including privileged
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instructions, FPU and MMU. SPARC V9 emulation includes most privileged
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and VIS instructions, FPU and I/D MMU. Alignment is fully enforced.
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@item Can run most 32-bit SPARC Linux binaries, SPARC32PLUS Linux binaries and
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some 64-bit SPARC Linux binaries.
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@end itemize
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Current QEMU limitations:
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@itemize
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@item IPC syscalls are missing.
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@item Floating point exception support is buggy.
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@item Atomic instructions are not correctly implemented.
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@item There are still some problems with Sparc64 emulators.
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@end itemize
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@node Xtensa
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@subsection Xtensa emulation
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@itemize
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@item Core Xtensa ISA emulation, including most options: code density,
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loop, extended L32R, 16- and 32-bit multiplication, 32-bit division,
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MAC16, miscellaneous operations, boolean, FP coprocessor, coprocessor
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context, debug, multiprocessor synchronization,
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conditional store, exceptions, relocatable vectors, unaligned exception,
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interrupts (including high priority and timer), hardware alignment,
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region protection, region translation, MMU, windowed registers, thread
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pointer, processor ID.
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@item Not implemented options: data/instruction cache (including cache
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prefetch and locking), XLMI, processor interface. Also options not
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covered by the core ISA (e.g. FLIX, wide branches) are not implemented.
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@item Can run most Xtensa Linux binaries.
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@item New core configuration that requires no additional instructions
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may be created from overlay with minimal amount of hand-written code.
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@end itemize
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@node Translator Internals
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@section Translator Internals
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QEMU is a dynamic translator. When it first encounters a piece of code,
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it converts it to the host instruction set. Usually dynamic translators
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are very complicated and highly CPU dependent. QEMU uses some tricks
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which make it relatively easily portable and simple while achieving good
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performances.
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QEMU's dynamic translation backend is called TCG, for "Tiny Code
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Generator". For more information, please take a look at @code{tcg/README}.
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Some notable features of QEMU's dynamic translator are:
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@table @strong
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@item CPU state optimisations:
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The target CPUs have many internal states which change the way it
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evaluates instructions. In order to achieve a good speed, the
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translation phase considers that some state information of the virtual
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CPU cannot change in it. The state is recorded in the Translation
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Block (TB). If the state changes (e.g. privilege level), a new TB will
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be generated and the previous TB won't be used anymore until the state
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matches the state recorded in the previous TB. The same idea can be applied
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to other aspects of the CPU state. For example, on x86, if the SS,
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DS and ES segments have a zero base, then the translator does not even
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generate an addition for the segment base.
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@item Direct block chaining:
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After each translated basic block is executed, QEMU uses the simulated
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Program Counter (PC) and other cpu state information (such as the CS
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segment base value) to find the next basic block.
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In order to accelerate the most common cases where the new simulated PC
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is known, QEMU can patch a basic block so that it jumps directly to the
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next one.
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The most portable code uses an indirect jump. An indirect jump makes
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it easier to make the jump target modification atomic. On some host
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architectures (such as x86 or PowerPC), the @code{JUMP} opcode is
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directly patched so that the block chaining has no overhead.
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@item Self-modifying code and translated code invalidation:
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Self-modifying code is a special challenge in x86 emulation because no
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instruction cache invalidation is signaled by the application when code
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is modified.
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User-mode emulation marks a host page as write-protected (if it is
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not already read-only) every time translated code is generated for a
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basic block. Then, if a write access is done to the page, Linux raises
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a SEGV signal. QEMU then invalidates all the translated code in the page
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and enables write accesses to the page. For system emulation, write
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protection is achieved through the software MMU.
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Correct translated code invalidation is done efficiently by maintaining
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a linked list of every translated block contained in a given page. Other
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linked lists are also maintained to undo direct block chaining.
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On RISC targets, correctly written software uses memory barriers and
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cache flushes, so some of the protection above would not be
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necessary. However, QEMU still requires that the generated code always
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matches the target instructions in memory in order to handle
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exceptions correctly.
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@item Exception support:
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longjmp() is used when an exception such as division by zero is
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encountered.
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The host SIGSEGV and SIGBUS signal handlers are used to get invalid
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memory accesses. QEMU keeps a map from host program counter to
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target program counter, and looks up where the exception happened
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based on the host program counter at the exception point.
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On some targets, some bits of the virtual CPU's state are not flushed to the
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memory until the end of the translation block. This is done for internal
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emulation state that is rarely accessed directly by the program and/or changes
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very often throughout the execution of a translation block---this includes
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condition codes on x86, delay slots on SPARC, conditional execution on
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ARM, and so on. This state is stored for each target instruction, and
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looked up on exceptions.
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@item MMU emulation:
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For system emulation QEMU uses a software MMU. In that mode, the MMU
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virtual to physical address translation is done at every memory
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access.
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QEMU uses an address translation cache (TLB) to speed up the translation.
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In order to avoid flushing the translated code each time the MMU
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mappings change, all caches in QEMU are physically indexed. This
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means that each basic block is indexed with its physical address.
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In order to avoid invalidating the basic block chain when MMU mappings
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change, chaining is only performed when the destination of the jump
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shares a page with the basic block that is performing the jump.
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The MMU can also distinguish RAM and ROM memory areas from MMIO memory
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areas. Access is faster for RAM and ROM because the translation cache also
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hosts the offset between guest address and host memory. Accessing MMIO
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memory areas instead calls out to C code for device emulation.
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Finally, the MMU helps tracking dirty pages and pages pointed to by
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translation blocks.
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@end table
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@node QEMU compared to other emulators
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@section QEMU compared to other emulators
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Like bochs [1], QEMU emulates an x86 CPU. But QEMU is much faster than
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bochs as it uses dynamic compilation. Bochs is closely tied to x86 PC
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emulation while QEMU can emulate several processors.
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Like Valgrind [2], QEMU does user space emulation and dynamic
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translation. Valgrind is mainly a memory debugger while QEMU has no
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support for it (QEMU could be used to detect out of bound memory
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accesses as Valgrind, but it has no support to track uninitialised data
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as Valgrind does). The Valgrind dynamic translator generates better code
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than QEMU (in particular it does register allocation) but it is closely
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tied to an x86 host and target and has no support for precise exceptions
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and system emulation.
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EM86 [3] is the closest project to user space QEMU (and QEMU still uses
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some of its code, in particular the ELF file loader). EM86 was limited
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to an alpha host and used a proprietary and slow interpreter (the
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interpreter part of the FX!32 Digital Win32 code translator [4]).
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TWIN from Willows Software was a Windows API emulator like Wine. It is less
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accurate than Wine but includes a protected mode x86 interpreter to launch
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x86 Windows executables. Such an approach has greater potential because most
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of the Windows API is executed natively but it is far more difficult to
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develop because all the data structures and function parameters exchanged
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between the API and the x86 code must be converted.
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User mode Linux [5] was the only solution before QEMU to launch a
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Linux kernel as a process while not needing any host kernel
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patches. However, user mode Linux requires heavy kernel patches while
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QEMU accepts unpatched Linux kernels. The price to pay is that QEMU is
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slower.
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The Plex86 [6] PC virtualizer is done in the same spirit as the now
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obsolete qemu-fast system emulator. It requires a patched Linux kernel
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to work (you cannot launch the same kernel on your PC), but the
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patches are really small. As it is a PC virtualizer (no emulation is
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done except for some privileged instructions), it has the potential of
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being faster than QEMU. The downside is that a complicated (and
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potentially unsafe) host kernel patch is needed.
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The commercial PC Virtualizers (VMWare [7], VirtualPC [8]) are faster
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than QEMU (without virtualization), but they all need specific, proprietary
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and potentially unsafe host drivers. Moreover, they are unable to
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provide cycle exact simulation as an emulator can.
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VirtualBox [9], Xen [10] and KVM [11] are based on QEMU. QEMU-SystemC
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[12] uses QEMU to simulate a system where some hardware devices are
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developed in SystemC.
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@node Managed start up options
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@section Managed start up options
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In system mode emulation, it's possible to create a VM in a paused state using
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the -S command line option. In this state the machine is completely initialized
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according to command line options and ready to execute VM code but VCPU threads
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are not executing any code. The VM state in this paused state depends on the way
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QEMU was started. It could be in:
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@table @asis
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@item initial state (after reset/power on state)
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@item with direct kernel loading, the initial state could be amended to execute
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code loaded by QEMU in the VM's RAM and with incoming migration
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@item with incoming migration, initial state will by amended with the migrated
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machine state after migration completes.
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@end table
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This paused state is typically used by users to query machine state and/or
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additionally configure the machine (by hotplugging devices) in runtime before
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allowing VM code to run.
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However, at the -S pause point, it's impossible to configure options that affect
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initial VM creation (like: -smp/-m/-numa ...) or cold plug devices. The
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experimental --preconfig command line option allows pausing QEMU
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before the initial VM creation, in a ``preconfig'' state, where additional
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queries and configuration can be performed via QMP before moving on to
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the resulting configuration startup. In the preconfig state, QEMU only allows
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a limited set of commands over the QMP monitor, where the commands do not
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depend on an initialized machine, including but not limited to:
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@table @asis
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@item qmp_capabilities
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@item query-qmp-schema
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@item query-commands
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@item query-status
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@item x-exit-preconfig
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@end table
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@node Bibliography
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@section Bibliography
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@table @asis
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@item [1]
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@url{http://bochs.sourceforge.net/}, the Bochs IA-32 Emulator Project,
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by Kevin Lawton et al.
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@item [2]
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@url{http://www.valgrind.org/}, Valgrind, an open-source memory debugger
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for GNU/Linux.
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@item [3]
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@url{http://ftp.dreamtime.org/pub/linux/Linux-Alpha/em86/v0.2/docs/em86.html},
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the EM86 x86 emulator on Alpha-Linux.
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@item [4]
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@url{http://www.usenix.org/publications/library/proceedings/usenix-nt97/@/full_papers/chernoff/chernoff.pdf},
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DIGITAL FX!32: Running 32-Bit x86 Applications on Alpha NT, by Anton
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Chernoff and Ray Hookway.
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@item [5]
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@url{http://user-mode-linux.sourceforge.net/},
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The User-mode Linux Kernel.
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@item [6]
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@url{http://www.plex86.org/},
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The new Plex86 project.
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@item [7]
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@url{http://www.vmware.com/},
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The VMWare PC virtualizer.
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@item [8]
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@url{https://www.microsoft.com/download/details.aspx?id=3702},
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The VirtualPC PC virtualizer.
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@item [9]
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@url{http://virtualbox.org/},
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The VirtualBox PC virtualizer.
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@item [10]
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@url{http://www.xen.org/},
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The Xen hypervisor.
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@item [11]
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@url{http://www.linux-kvm.org/},
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Kernel Based Virtual Machine (KVM).
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@item [12]
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@url{http://www.greensocs.com/projects/QEMUSystemC},
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QEMU-SystemC, a hardware co-simulator.
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@end table
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