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a3ebb580a2
Add read and write functions for accessing registers of I2C devices connected to the Aspeed I2C controller. Signed-off-by: Stefan Berger <stefanb@linux.ibm.com> Reviewed-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Ninad Palsule <ninad@linux.ibm.com> Message-Id: <20230331173051.3857801-2-stefanb@linux.ibm.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
118 lines
3.5 KiB
C
118 lines
3.5 KiB
C
/*
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* Aspeed i2c bus interface for reading from and writing to i2c device registers
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*
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* Copyright (c) 2023 IBM Corporation
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*
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* Authors:
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* Stefan Berger <stefanb@linux.ibm.com>
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*
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* This work is licensed under the terms of the GNU GPL, version 2 or later.
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* See the COPYING file in the top-level directory.
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*/
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#include "qemu/osdep.h"
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#include "qtest_aspeed.h"
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#include "hw/i2c/aspeed_i2c.h"
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static void aspeed_i2c_startup(QTestState *s, uint32_t baseaddr,
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uint8_t slave_addr, uint8_t reg)
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{
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uint32_t v;
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static int once;
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if (!once) {
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/* one time: enable master */
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qtest_writel(s, baseaddr + A_I2CC_FUN_CTRL, 0);
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v = qtest_readl(s, baseaddr + A_I2CC_FUN_CTRL) | A_I2CD_MASTER_EN;
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qtest_writel(s, baseaddr + A_I2CC_FUN_CTRL, v);
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once = 1;
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}
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/* select device */
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qtest_writel(s, baseaddr + A_I2CD_BYTE_BUF, slave_addr << 1);
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qtest_writel(s, baseaddr + A_I2CD_CMD,
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A_I2CD_M_START_CMD | A_I2CD_M_RX_CMD);
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/* select the register to write to */
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qtest_writel(s, baseaddr + A_I2CD_BYTE_BUF, reg);
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qtest_writel(s, baseaddr + A_I2CD_CMD, A_I2CD_M_TX_CMD);
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}
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static uint32_t aspeed_i2c_read_n(QTestState *s,
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uint32_t baseaddr, uint8_t slave_addr,
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uint8_t reg, size_t nbytes)
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{
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uint32_t res = 0;
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uint32_t v;
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size_t i;
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aspeed_i2c_startup(s, baseaddr, slave_addr, reg);
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for (i = 0; i < nbytes; i++) {
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qtest_writel(s, baseaddr + A_I2CD_CMD, A_I2CD_M_RX_CMD);
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v = qtest_readl(s, baseaddr + A_I2CD_BYTE_BUF) >> 8;
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res |= (v & 0xff) << (i * 8);
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}
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qtest_writel(s, baseaddr + A_I2CD_CMD, A_I2CD_M_STOP_CMD);
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return res;
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}
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uint32_t aspeed_i2c_readl(QTestState *s,
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uint32_t baseaddr, uint8_t slave_addr, uint8_t reg)
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{
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return aspeed_i2c_read_n(s, baseaddr, slave_addr, reg, sizeof(uint32_t));
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}
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uint16_t aspeed_i2c_readw(QTestState *s,
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uint32_t baseaddr, uint8_t slave_addr, uint8_t reg)
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{
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return aspeed_i2c_read_n(s, baseaddr, slave_addr, reg, sizeof(uint16_t));
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}
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uint8_t aspeed_i2c_readb(QTestState *s,
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uint32_t baseaddr, uint8_t slave_addr, uint8_t reg)
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{
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return aspeed_i2c_read_n(s, baseaddr, slave_addr, reg, sizeof(uint8_t));
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}
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static void aspeed_i2c_write_n(QTestState *s,
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uint32_t baseaddr, uint8_t slave_addr,
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uint8_t reg, uint32_t v, size_t nbytes)
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{
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size_t i;
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aspeed_i2c_startup(s, baseaddr, slave_addr, reg);
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for (i = 0; i < nbytes; i++) {
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qtest_writel(s, baseaddr + A_I2CD_BYTE_BUF, v & 0xff);
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v >>= 8;
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qtest_writel(s, baseaddr + A_I2CD_CMD, A_I2CD_M_TX_CMD);
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}
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qtest_writel(s, baseaddr + A_I2CD_CMD, A_I2CD_M_STOP_CMD);
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}
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void aspeed_i2c_writel(QTestState *s,
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uint32_t baseaddr, uint8_t slave_addr,
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uint8_t reg, uint32_t v)
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{
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aspeed_i2c_write_n(s, baseaddr, slave_addr, reg, v, sizeof(v));
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}
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void aspeed_i2c_writew(QTestState *s,
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uint32_t baseaddr, uint8_t slave_addr,
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uint8_t reg, uint16_t v)
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{
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aspeed_i2c_write_n(s, baseaddr, slave_addr, reg, v, sizeof(v));
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}
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void aspeed_i2c_writeb(QTestState *s,
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uint32_t baseaddr, uint8_t slave_addr,
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uint8_t reg, uint8_t v)
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{
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aspeed_i2c_write_n(s, baseaddr, slave_addr, reg, v, sizeof(v));
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}
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