qemu/tcg/riscv
Alistair Francis 7ab7e9c7c7 tcg/riscv: Fix RISC-VH host build failure
Commit 269bd5d8 "cpu: Move the softmmu tlb to CPUNegativeOffsetState'
broke the RISC-V host build as there are two variables that are used but
not defined.

This patch renames the undefined variables mask_off and table_off to the
existing (but unused) mask_ofs and table_ofs variables.

Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Message-Id: <79729cc88ca509e08b5c4aa0aa8a52847af70c0f.1561039316.git.alistair.francis@wdc.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2019-07-09 08:26:11 +02:00
..
tcg-target.h tcg: Add INDEX_op_extract2_{i32,i64} 2019-04-24 13:04:33 -07:00
tcg-target.inc.c tcg/riscv: Fix RISC-VH host build failure 2019-07-09 08:26:11 +02:00