qemu/target/arm
Peter Maydell 50cd71b0d3 arm: check regime, not current state, for ATS write PAR format
In do_ats_write(), rather than using extended_addresses_enabled() to
decide whether the value we get back from get_phys_addr() is a 64-bit
format PAR or a 32-bit one, use arm_s1_regime_using_lpae_format().

This is not really the correct answer, because the PAR format
depends on the AT instruction being used, not just on the
translation regime. However getting this correct requires a
significant refactoring, so that get_phys_addr() returns raw
information about the fault which the caller can then assemble
into a suitable FSR/PAR/syndrome for its purposes, rather than
get_phys_addr() returning a pre-formatted FSR.

However this change at least improves the situation by making
the PAR work correctly for address translation operations done
at AArch64 EL2 on the EL2 translation regime. In particular,
this is necessary for Xen to be able to run in our emulation,
so this seems like a safer interim fix given that we are in freeze.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Tested-by: Stefano Stabellini <sstabellini@kernel.org>
Message-id: 1509719814-6191-1-git-send-email-peter.maydell@linaro.org
2017-11-20 13:42:25 +00:00
..
arch_dump.c hmp: fix "dump-quest-memory" segfault (arm) 2017-09-14 15:52:10 +01:00
arm-powerctl.c target-arm/powerctl: defer cpu reset work to CPU context 2017-02-24 10:32:46 +00:00
arm-powerctl.h target-arm/powerctl: defer cpu reset work to CPU context 2017-02-24 10:32:46 +00:00
arm-semi.c
arm_ldst.h Fix Thumb-1 BE32 execution and disassembly. 2017-02-07 18:29:59 +00:00
cpu-qom.h
cpu.c disas: Dump insn bytes along with capstone disassembly 2017-11-09 08:46:38 +01:00
cpu.h target/arm: Factor out "get mmuidx for specified security state" 2017-10-06 16:46:49 +01:00
cpu64.c target-arm: Enable EL2 feature bit on A53 and A57 2017-01-20 11:15:10 +00:00
crypto_helper.c
gdbstub.c
gdbstub64.c
helper-a64.c target/arm: Fix GETPC usage in do_paired_cmpxchg64_l/be 2017-11-15 10:34:33 +01:00
helper-a64.h target/arm: check CF_PARALLEL instead of parallel_cpus 2017-10-24 13:53:41 -07:00
helper.c arm: check regime, not current state, for ATS write PAR format 2017-11-20 13:42:25 +00:00
helper.h fix WFI/WFE length in syndrome register 2017-10-31 11:50:50 +00:00
internals.h fix WFI/WFE length in syndrome register 2017-10-31 11:50:50 +00:00
iwmmxt_helper.c
kvm-consts.h arm: add trailing ; after MISMATCH_CHECK 2017-02-01 03:37:18 +02:00
kvm-stub.c
kvm.c hw/arm/virt: allow pmu instantiation with userspace irqchip 2017-09-04 15:21:54 +01:00
kvm32.c target/arm/kvm: pmu: improve error handling 2017-09-04 15:21:54 +01:00
kvm64.c target/arm/kvm: pmu: improve error handling 2017-09-04 15:21:54 +01:00
kvm_arm.h target/arm/kvm: pmu: improve error handling 2017-09-04 15:21:54 +01:00
machine.c nvic: Implement Security Attribution Unit registers 2017-10-06 16:46:49 +01:00
Makefile.objs
monitor.c
neon_helper.c
op_addsub.h
op_helper.c fix WFI/WFE length in syndrome register 2017-10-31 11:50:50 +00:00
psci.c fix WFI/WFE length in syndrome register 2017-10-31 11:50:50 +00:00
trace-events trace-events: fix code style: print 0x before hex numbers 2017-08-01 12:13:07 +01:00
translate-a64.c arm/translate-a64: mark path as unreachable to eliminate warning 2017-11-13 13:55:24 +00:00
translate.c translate.c: Fix usermode big-endian AArch32 LDREXD and STREXD 2017-11-07 13:03:51 +00:00
translate.h tcg: Initialize cpu_env generically 2017-10-24 13:53:42 -07:00