mirror of
https://gitlab.com/qemu-project/qemu
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280 lines
7.5 KiB
C
280 lines
7.5 KiB
C
/*
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* QEMU Firmware configuration device emulation
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*
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* Copyright (c) 2008 Gleb Natapov
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#include "hw.h"
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#include "sysemu.h"
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#include "isa.h"
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#include "fw_cfg.h"
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/* debug firmware config */
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//#define DEBUG_FW_CFG
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#ifdef DEBUG_FW_CFG
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#define FW_CFG_DPRINTF(fmt, ...) \
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do { printf("FW_CFG: " fmt , ## __VA_ARGS__); } while (0)
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#else
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#define FW_CFG_DPRINTF(fmt, ...)
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#endif
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#define FW_CFG_SIZE 2
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typedef struct _FWCfgEntry {
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uint16_t len;
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uint8_t *data;
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void *callback_opaque;
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FWCfgCallback callback;
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} FWCfgEntry;
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typedef struct _FWCfgState {
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FWCfgEntry entries[2][FW_CFG_MAX_ENTRY];
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uint16_t cur_entry;
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uint16_t cur_offset;
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} FWCfgState;
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static void fw_cfg_write(FWCfgState *s, uint8_t value)
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{
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int arch = !!(s->cur_entry & FW_CFG_ARCH_LOCAL);
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FWCfgEntry *e = &s->entries[arch][s->cur_entry & FW_CFG_ENTRY_MASK];
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FW_CFG_DPRINTF("write %d\n", value);
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if (s->cur_entry & FW_CFG_WRITE_CHANNEL && s->cur_offset < e->len) {
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e->data[s->cur_offset++] = value;
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if (s->cur_offset == e->len) {
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e->callback(e->callback_opaque, e->data);
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s->cur_offset = 0;
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}
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}
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}
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static int fw_cfg_select(FWCfgState *s, uint16_t key)
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{
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int ret;
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s->cur_offset = 0;
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if ((key & FW_CFG_ENTRY_MASK) >= FW_CFG_MAX_ENTRY) {
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s->cur_entry = FW_CFG_INVALID;
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ret = 0;
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} else {
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s->cur_entry = key;
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ret = 1;
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}
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FW_CFG_DPRINTF("select key %d (%sfound)\n", key, ret ? "" : "not ");
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return ret;
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}
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static uint8_t fw_cfg_read(FWCfgState *s)
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{
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int arch = !!(s->cur_entry & FW_CFG_ARCH_LOCAL);
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FWCfgEntry *e = &s->entries[arch][s->cur_entry & FW_CFG_ENTRY_MASK];
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uint8_t ret;
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if (s->cur_entry == FW_CFG_INVALID || !e->data || s->cur_offset >= e->len)
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ret = 0;
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else
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ret = e->data[s->cur_offset++];
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FW_CFG_DPRINTF("read %d\n", ret);
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return ret;
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}
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static uint32_t fw_cfg_io_readb(void *opaque, uint32_t addr)
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{
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return fw_cfg_read(opaque);
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}
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static void fw_cfg_io_writeb(void *opaque, uint32_t addr, uint32_t value)
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{
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fw_cfg_write(opaque, (uint8_t)value);
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}
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static void fw_cfg_io_writew(void *opaque, uint32_t addr, uint32_t value)
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{
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fw_cfg_select(opaque, (uint16_t)value);
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}
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static uint32_t fw_cfg_mem_readb(void *opaque, target_phys_addr_t addr)
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{
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return fw_cfg_read(opaque);
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}
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static void fw_cfg_mem_writeb(void *opaque, target_phys_addr_t addr,
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uint32_t value)
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{
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fw_cfg_write(opaque, (uint8_t)value);
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}
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static void fw_cfg_mem_writew(void *opaque, target_phys_addr_t addr,
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uint32_t value)
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{
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fw_cfg_select(opaque, (uint16_t)value);
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}
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static CPUReadMemoryFunc * const fw_cfg_ctl_mem_read[3] = {
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NULL,
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NULL,
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NULL,
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};
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static CPUWriteMemoryFunc * const fw_cfg_ctl_mem_write[3] = {
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NULL,
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fw_cfg_mem_writew,
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NULL,
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};
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static CPUReadMemoryFunc * const fw_cfg_data_mem_read[3] = {
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fw_cfg_mem_readb,
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NULL,
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NULL,
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};
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static CPUWriteMemoryFunc * const fw_cfg_data_mem_write[3] = {
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fw_cfg_mem_writeb,
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NULL,
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NULL,
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};
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static void fw_cfg_reset(void *opaque)
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{
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FWCfgState *s = opaque;
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fw_cfg_select(s, 0);
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}
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static const VMStateDescription vmstate_fw_cfg = {
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.name = "fw_cfg",
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.version_id = 1,
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.minimum_version_id = 1,
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.minimum_version_id_old = 1,
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.fields = (VMStateField []) {
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VMSTATE_UINT16(cur_entry, FWCfgState),
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VMSTATE_UINT16(cur_offset, FWCfgState),
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VMSTATE_END_OF_LIST()
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}
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};
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int fw_cfg_add_bytes(void *opaque, uint16_t key, uint8_t *data, uint16_t len)
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{
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FWCfgState *s = opaque;
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int arch = !!(key & FW_CFG_ARCH_LOCAL);
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key &= FW_CFG_ENTRY_MASK;
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if (key >= FW_CFG_MAX_ENTRY)
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return 0;
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s->entries[arch][key].data = data;
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s->entries[arch][key].len = len;
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return 1;
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}
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int fw_cfg_add_i16(void *opaque, uint16_t key, uint16_t value)
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{
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uint16_t *copy;
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copy = qemu_malloc(sizeof(value));
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*copy = cpu_to_le16(value);
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return fw_cfg_add_bytes(opaque, key, (uint8_t *)copy, sizeof(value));
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}
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int fw_cfg_add_i32(void *opaque, uint16_t key, uint32_t value)
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{
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uint32_t *copy;
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copy = qemu_malloc(sizeof(value));
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*copy = cpu_to_le32(value);
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return fw_cfg_add_bytes(opaque, key, (uint8_t *)copy, sizeof(value));
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}
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int fw_cfg_add_i64(void *opaque, uint16_t key, uint64_t value)
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{
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uint64_t *copy;
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copy = qemu_malloc(sizeof(value));
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*copy = cpu_to_le64(value);
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return fw_cfg_add_bytes(opaque, key, (uint8_t *)copy, sizeof(value));
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}
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int fw_cfg_add_callback(void *opaque, uint16_t key, FWCfgCallback callback,
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void *callback_opaque, uint8_t *data, size_t len)
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{
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FWCfgState *s = opaque;
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int arch = !!(key & FW_CFG_ARCH_LOCAL);
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if (!(key & FW_CFG_WRITE_CHANNEL))
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return 0;
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key &= FW_CFG_ENTRY_MASK;
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if (key >= FW_CFG_MAX_ENTRY || len > 65535)
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return 0;
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s->entries[arch][key].data = data;
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s->entries[arch][key].len = len;
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s->entries[arch][key].callback_opaque = callback_opaque;
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s->entries[arch][key].callback = callback;
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return 1;
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}
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void *fw_cfg_init(uint32_t ctl_port, uint32_t data_port,
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target_phys_addr_t ctl_addr, target_phys_addr_t data_addr)
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{
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FWCfgState *s;
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int io_ctl_memory, io_data_memory;
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s = qemu_mallocz(sizeof(FWCfgState));
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if (ctl_port) {
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register_ioport_write(ctl_port, 2, 2, fw_cfg_io_writew, s);
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}
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if (data_port) {
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register_ioport_read(data_port, 1, 1, fw_cfg_io_readb, s);
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register_ioport_write(data_port, 1, 1, fw_cfg_io_writeb, s);
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}
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if (ctl_addr) {
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io_ctl_memory = cpu_register_io_memory(fw_cfg_ctl_mem_read,
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fw_cfg_ctl_mem_write, s);
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cpu_register_physical_memory(ctl_addr, FW_CFG_SIZE, io_ctl_memory);
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}
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if (data_addr) {
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io_data_memory = cpu_register_io_memory(fw_cfg_data_mem_read,
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fw_cfg_data_mem_write, s);
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cpu_register_physical_memory(data_addr, FW_CFG_SIZE, io_data_memory);
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}
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fw_cfg_add_bytes(s, FW_CFG_SIGNATURE, (uint8_t *)"QEMU", 4);
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fw_cfg_add_bytes(s, FW_CFG_UUID, qemu_uuid, 16);
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fw_cfg_add_i16(s, FW_CFG_NOGRAPHIC, (uint16_t)(display_type == DT_NOGRAPHIC));
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fw_cfg_add_i16(s, FW_CFG_NB_CPUS, (uint16_t)smp_cpus);
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fw_cfg_add_i16(s, FW_CFG_MAX_CPUS, (uint16_t)max_cpus);
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fw_cfg_add_i16(s, FW_CFG_BOOT_MENU, (uint16_t)boot_menu);
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vmstate_register(-1, &vmstate_fw_cfg, s);
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qemu_register_reset(fw_cfg_reset, s);
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return s;
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}
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