Jonathan Cameron 2c9ec2a827 hw/pci-bridge/cxl-upstream: Add serial number extended capability support ... Will be needed so there is a defined serial number for information queries via the Switch CCI. Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Message-Id: <20230913133615.29876-1-Jonathan.Cameron@huawei.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>		2023-10-04 18:15:06 -04:00
..
cxl_downstream.c	hw/pci: spelling fixes	2023-09-20 07:54:34 +03:00
cxl_root_port.c	hw/pci-bridge/cxl_root_port: Wire up MSI	2023-03-07 12:39:00 -05:00
cxl_upstream.c	hw/pci-bridge/cxl-upstream: Add serial number extended capability support	2023-10-04 18:15:06 -04:00
gen_pcie_root_port.c	pci: acpi hotplug: rename x-native-hotplug to x-do-not-expose-native-hotplug-cap	2023-01-28 06:21:29 -05:00
i82801b11.c	hw: Move ich9.h to southbridge/	2023-02-27 22:29:01 +01:00
ioh3420.c	Include migration/vmstate.h less	2019-08-16 13:31:52 +02:00
Kconfig	hw/pci-bridge: make building pcie-to-pci bridge configurable	2023-05-19 10:30:46 -04:00
meson.build	meson: Replace softmmu_ss -> system_ss	2023-06-20 10:01:30 +02:00
pci_bridge_dev.c	pci_bridge: remove whitespace	2023-01-28 06:21:29 -05:00
pci_expander_bridge.c	hw/pci: spelling fixes	2023-09-20 07:54:34 +03:00
pci_expander_bridge_stubs.c	pci/pci_expander_bridge: For CXL HB delay the HB register memory region setup.	2022-06-09 19:32:49 -04:00
pcie_pci_bridge.c	pci: drop redundant PCIDeviceClass::is_bridge field	2022-12-21 07:32:24 -05:00
pcie_root_port.c	pci: drop redundant PCIDeviceClass::is_bridge field	2022-12-21 07:32:24 -05:00
simba.c	pci: drop redundant PCIDeviceClass::is_bridge field	2022-12-21 07:32:24 -05:00
xio3130_downstream.c	pci: drop redundant PCIDeviceClass::is_bridge field	2022-12-21 07:32:24 -05:00
xio3130_upstream.c	pci: drop redundant PCIDeviceClass::is_bridge field	2022-12-21 07:32:24 -05:00