qemu/gdb-xml
Michael Rolnik 12b3540547 target/avr: CPU class: Add GDB support
This includes GDB hooks for reading from wnd wrtiting to AVR
registers, and xml register definition file as well.

[AM: Split a larger AVR introduction patch into logical units]
Suggested-by: Aleksandar Markovic <aleksandar.m.mail@gmail.com>
Co-developed-by: Michael Rolnik <mrolnik@gmail.com>
Co-developed-by: Sarah Harris <S.E.Harris@kent.ac.uk>
Signed-off-by: Michael Rolnik <mrolnik@gmail.com>
Signed-off-by: Sarah Harris <S.E.Harris@kent.ac.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Aleksandar Markovic <aleksandar.m.mail@gmail.com>
Acked-by: Igor Mammedov <imammedo@redhat.com>
Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com>
[thuth: Fixed avr_cpu_gdb_read_register() parameter]
Signed-off-by: Thomas Huth <huth@tuxfamily.org>
Message-Id: <20200705140315.260514-7-huth@tuxfamily.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
2020-07-10 17:58:32 +02:00
..
aarch64-core.xml
aarch64-fpu.xml
arm-core.xml
arm-m-profile.xml target/arm: Use correct GDB XML for M-profile cores 2020-05-14 15:03:08 +01:00
arm-neon.xml
arm-vfp.xml
arm-vfp3.xml
avr-cpu.xml target/avr: CPU class: Add GDB support 2020-07-10 17:58:32 +02:00
cf-core.xml
cf-fp.xml
i386-32bit.xml
i386-64bit.xml
m68k-core.xml target/m68k: fix gdb for m68xxx 2020-05-06 09:29:26 +01:00
m68k-fp.xml
power-altivec.xml
power-core.xml
power-fpu.xml
power-spe.xml
power-vsx.xml
power64-core.xml
riscv-32bit-cpu.xml RISC-V: Add 32-bit gdb xml files. 2019-03-19 05:13:24 -07:00
riscv-32bit-csr.xml RISC-V: Add 32-bit gdb xml files. 2019-03-19 05:13:24 -07:00
riscv-32bit-fpu.xml RISC-V: Add 64-bit gdb xml files. 2019-03-19 05:13:24 -07:00
riscv-32bit-virtual.xml target/riscv: Expose "priv" register for GDB for reads 2019-10-28 07:47:29 -07:00
riscv-64bit-cpu.xml RISC-V: Add 64-bit gdb xml files. 2019-03-19 05:13:24 -07:00
riscv-64bit-csr.xml RISC-V: Add 64-bit gdb xml files. 2019-03-19 05:13:24 -07:00
riscv-64bit-fpu.xml RISC-V: Add 64-bit gdb xml files. 2019-03-19 05:13:24 -07:00
riscv-64bit-virtual.xml target/riscv: Expose "priv" register for GDB for reads 2019-10-28 07:47:29 -07:00
rx-core.xml target/rx: CPU definitions 2020-03-19 17:58:05 +01:00
s390-acr.xml
s390-cr.xml
s390-fpr.xml
s390-gs.xml
s390-virt.xml
s390-vx.xml
s390x-core64.xml