qemu/hw/ssi
Cédric Le Goater 924ed16386 ast2400: add SPI flash slaves
Each controller on the ast2400 has a memory range on which it maps its
flash module slaves. Each slave is assigned a memory segment for its
mapping that can be changed at bootime with the Segment Address
Register. This is not supported in the current implementation so we
are using the defaults provided by the specs.

Each SPI flash slave can then be accessed in two modes: Command and
User. When in User mode, accesses to the memory segment of the slaves
are translated in SPI transfers. When in Command mode, the HW
generates the SPI commands automatically and the memory segment is
accessed as if doing a MMIO. Other SPI controllers call that mode
linear addressing mode.

For this purpose, we are adding below each crontoller an array of
structs gathering for each SPI flash module, a segment rank, a
MemoryRegion to handle the memory accesses and the associated SPI
slave device, which should be a m25p80.

Only the User mode is supported for now but we are preparing ground
for the Command mode. The framework is sufficient to support Linux.

Signed-off-by: Cédric Le Goater <clg@kaod.org>
Message-id: 1467138270-32481-8-git-send-email-clg@kaod.org
[PMM: Use g_new0() rather than g_malloc0()]
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-07-04 13:15:22 +01:00
..
aspeed_smc.c ast2400: add SPI flash slaves 2016-07-04 13:15:22 +01:00
imx_spi.c hw: explicitly include qemu/log.h 2016-05-19 16:42:29 +02:00
Makefile.objs ast2400: add SMC controllers (FMC and SPI) 2016-07-04 13:15:22 +01:00
omap_spi.c arm devices: Clean up includes 2016-01-29 15:07:25 +00:00
pl022.c hw: explicitly include qemu/log.h 2016-05-19 16:42:29 +02:00
ssi.c ssi: change ssi_slave_init to be a realize ops 2016-07-04 13:15:22 +01:00
xilinx_spi.c arm: Clean up includes 2016-01-29 15:07:23 +00:00
xilinx_spips.c arm: Clean up includes 2016-01-29 15:07:23 +00:00