qemu/tcg/aarch64
Sergey Sorokin 1f00b27f17 tcg: Improve the alignment check infrastructure
Some architectures (e.g. ARMv8) need the address which is aligned
to a size more than the size of the memory access.
To support such check it's enough the current costless alignment
check implementation in QEMU, but we need to support
an alignment size specifying.

Signed-off-by: Sergey Sorokin <afarallax@yandex.ru>
Message-Id: <1466705806-679898-1-git-send-email-afarallax@yandex.ru>
Signed-off-by: Richard Henderson <rth@twiddle.net>
[rth: Assert in tcg_canonicalize_memop.  Leave get_alignment_bits
available for, though unused by, user-mode.  Retain logging difference
based on ALIGNED_ONLY.]
2016-07-05 20:50:13 -07:00
..
tcg-target.h tcg: Split trunc_shr_i32 opcode into extr[lh]_i64_i32 2015-08-24 11:10:54 -07:00
tcg-target.inc.c tcg: Improve the alignment check infrastructure 2016-07-05 20:50:13 -07:00