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3384f95c59
This patch adds a PCI bus to the pseries machine. This instantiates the qemu generic PCI bus code, advertises a PCI host bridge in the guest's device tree and implements the RTAS methods specified by PAPR to access PCI config space. It also sets up the memory regions we need to provide windows into the PCI memory and IO space, and advertises those to the guest. However, because qemu can't yet emulate an IOMMU, which is mandatory on pseries, PCI devices which use DMA (i.e. most of them) will not work with this code alone. Still, this is enough to support the virtio_pci device (which probably _should_ use emulated PCI DMA, but is specced to use direct hypervisor access to guest physical memory instead). [agraf] remove typedef which could cause compile errors Signed-off-by: Alexey Kardashevskiy <aik@au1.ibm.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Alexander Graf <agraf@suse.de>
61 lines
1.8 KiB
C
61 lines
1.8 KiB
C
/*
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* QEMU SPAPR PCI BUS definitions
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*
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* Copyright (c) 2011 Alexey Kardashevskiy <aik@au1.ibm.com>
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2 of the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, see <http://www.gnu.org/licenses/>.
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*/
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#if !defined(__HW_SPAPR_H__)
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#error Please include spapr.h before this file!
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#endif
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#if !defined(__HW_SPAPR_PCI_H__)
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#define __HW_SPAPR_PCI_H__
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#include "hw/pci_host.h"
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#include "hw/xics.h"
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#define SPAPR_PCI_NUM_LSI 16
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typedef struct sPAPRPHBState {
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SysBusDevice busdev;
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PCIHostState host_state;
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uint64_t buid;
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MemoryRegion memspace, iospace;
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target_phys_addr_t mem_win_addr, io_win_addr;
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MemoryRegion memwindow, iowindow;
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struct {
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uint32_t dt_irq;
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qemu_irq qirq;
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} lsi_table[SPAPR_PCI_NUM_LSI];
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QLIST_ENTRY(sPAPRPHBState) list;
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} sPAPRPHBState;
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#define SPAPR_PCI_MEM_WIN_BUS_OFFSET 0x80000000ULL
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#define SPAPR_PCI_IO_WIN_SIZE 0x10000
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void spapr_create_phb(sPAPREnvironment *spapr,
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const char *busname, uint64_t buid,
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uint64_t mem_win_addr, uint64_t mem_win_size,
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uint64_t io_win_addr);
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int spapr_populate_pci_devices(sPAPRPHBState *phb,
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uint32_t xics_phandle,
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void *fdt);
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#endif /* __HW_SPAPR_PCI_H__ */
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