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https://gitlab.com/qemu-project/qemu
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a4c75a21f3
The core pcnet emulation code is used by both the PCI "pcnet" device and the SPARC "lance" device. Split the common code frm the PCI code so that that can be configures independantly. Signed-off-by: Paul Brook <paul@codesourcery.com>
42 lines
1.4 KiB
C
42 lines
1.4 KiB
C
#define PCNET_IOPORT_SIZE 0x20
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#define PCNET_PNPMMIO_SIZE 0x20
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#define PCNET_LOOPTEST_CRC 1
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#define PCNET_LOOPTEST_NOCRC 2
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typedef struct PCNetState_st PCNetState;
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struct PCNetState_st {
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NICState *nic;
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NICConf conf;
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QEMUTimer *poll_timer;
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int rap, isr, lnkst;
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uint32_t rdra, tdra;
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uint8_t prom[16];
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uint16_t csr[128];
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uint16_t bcr[32];
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uint64_t timer;
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int mmio_index, xmit_pos;
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uint8_t buffer[4096];
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int tx_busy;
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qemu_irq irq;
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void (*phys_mem_read)(void *dma_opaque, target_phys_addr_t addr,
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uint8_t *buf, int len, int do_bswap);
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void (*phys_mem_write)(void *dma_opaque, target_phys_addr_t addr,
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uint8_t *buf, int len, int do_bswap);
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void *dma_opaque;
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int looptest;
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};
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void pcnet_h_reset(void *opaque);
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void pcnet_ioport_writew(void *opaque, uint32_t addr, uint32_t val);
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uint32_t pcnet_ioport_readw(void *opaque, uint32_t addr);
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void pcnet_ioport_writel(void *opaque, uint32_t addr, uint32_t val);
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uint32_t pcnet_ioport_readl(void *opaque, uint32_t addr);
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uint32_t pcnet_bcr_readw(PCNetState *s, uint32_t rap);
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int pcnet_can_receive(VLANClientState *nc);
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ssize_t pcnet_receive(VLANClientState *nc, const uint8_t *buf, size_t size_);
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void pcnet_common_cleanup(PCNetState *d);
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int pcnet_common_init(DeviceState *dev, PCNetState *s, NetClientInfo *info);
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extern const VMStateDescription vmstate_pcnet;
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