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17ffe331a9
Since GDB 13.1(GDB commit ea3352172), GDB LoongArch changed to use
fcc0-7 instead of fcc register. This commit partially reverts commit
2f149c759 (`target/loongarch: Update gdb_set_fpu() and gdb_get_fpu()`)
to match the behavior of GDB.
Note that it is a breaking change for GDB 13.0 or earlier, but it is
also required for GDB 13.1 or later to work.
Signed-off-by: Jiajie Chen <c@jia.je>
Acked-by: Song Gao <gaosong@loongson.cn>
Message-Id: <20230808054315.3391465-1-c@jia.je>
Signed-off-by: Song Gao <gaosong@loongson.cn>
57 lines
2.9 KiB
XML
57 lines
2.9 KiB
XML
<?xml version="1.0"?>
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<!-- Copyright (C) 2021 Free Software Foundation, Inc.
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Copying and distribution of this file, with or without modification,
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are permitted in any medium without royalty provided the copyright
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notice and this notice are preserved. -->
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<!DOCTYPE feature SYSTEM "gdb-target.dtd">
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<feature name="org.gnu.gdb.loongarch.fpu">
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<union id="fputype">
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<field name="f" type="ieee_single"/>
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<field name="d" type="ieee_double"/>
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</union>
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<reg name="f0" bitsize="64" type="fputype" group="float"/>
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<reg name="f1" bitsize="64" type="fputype" group="float"/>
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<reg name="f2" bitsize="64" type="fputype" group="float"/>
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<reg name="f3" bitsize="64" type="fputype" group="float"/>
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<reg name="f4" bitsize="64" type="fputype" group="float"/>
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<reg name="f5" bitsize="64" type="fputype" group="float"/>
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<reg name="f6" bitsize="64" type="fputype" group="float"/>
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<reg name="f7" bitsize="64" type="fputype" group="float"/>
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<reg name="f8" bitsize="64" type="fputype" group="float"/>
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<reg name="f9" bitsize="64" type="fputype" group="float"/>
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<reg name="f10" bitsize="64" type="fputype" group="float"/>
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<reg name="f11" bitsize="64" type="fputype" group="float"/>
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<reg name="f12" bitsize="64" type="fputype" group="float"/>
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<reg name="f13" bitsize="64" type="fputype" group="float"/>
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<reg name="f14" bitsize="64" type="fputype" group="float"/>
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<reg name="f15" bitsize="64" type="fputype" group="float"/>
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<reg name="f16" bitsize="64" type="fputype" group="float"/>
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<reg name="f17" bitsize="64" type="fputype" group="float"/>
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<reg name="f18" bitsize="64" type="fputype" group="float"/>
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<reg name="f19" bitsize="64" type="fputype" group="float"/>
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<reg name="f20" bitsize="64" type="fputype" group="float"/>
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<reg name="f21" bitsize="64" type="fputype" group="float"/>
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<reg name="f22" bitsize="64" type="fputype" group="float"/>
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<reg name="f23" bitsize="64" type="fputype" group="float"/>
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<reg name="f24" bitsize="64" type="fputype" group="float"/>
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<reg name="f25" bitsize="64" type="fputype" group="float"/>
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<reg name="f26" bitsize="64" type="fputype" group="float"/>
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<reg name="f27" bitsize="64" type="fputype" group="float"/>
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<reg name="f28" bitsize="64" type="fputype" group="float"/>
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<reg name="f29" bitsize="64" type="fputype" group="float"/>
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<reg name="f30" bitsize="64" type="fputype" group="float"/>
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<reg name="f31" bitsize="64" type="fputype" group="float"/>
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<reg name="fcc0" bitsize="8" type="uint8" group="float"/>
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<reg name="fcc1" bitsize="8" type="uint8" group="float"/>
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<reg name="fcc2" bitsize="8" type="uint8" group="float"/>
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<reg name="fcc3" bitsize="8" type="uint8" group="float"/>
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<reg name="fcc4" bitsize="8" type="uint8" group="float"/>
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<reg name="fcc5" bitsize="8" type="uint8" group="float"/>
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<reg name="fcc6" bitsize="8" type="uint8" group="float"/>
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<reg name="fcc7" bitsize="8" type="uint8" group="float"/>
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<reg name="fcsr" bitsize="32" type="uint32" group="float"/>
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</feature>
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