qemu/include/hw/cxl
Jonathan Cameron 9c769e0446 mem/cxl-type3: Add sn option to provide serial number for PCI ecap
The Device Serial Number Extended Capability PCI r6.0 sec 7.9.3
provides a standard way to provide a device serial number as
an IEEE defined 64-bit extended unique identifier EUI-64.

CXL 2.0 section 8.1.12.2 Memory Device PCIe Capabilities and
Extended Capabilities requires this to be used to uniquely
identify CXL memory devices.

Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Message-Id: <20220923161835.9805-1-Jonathan.Cameron@huawei.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Reviewed-by: Ben Widawsky <bwidawsk@kernel.org>
2022-10-09 16:38:45 -04:00
..
cxl.h pci-bridge/cxl_upstream: Add a CXL switch upstream port 2022-06-16 12:54:57 -04:00
cxl_component.h hw/cxl: Fix size of constant in interleave granularity function. 2022-07-26 10:40:58 -04:00
cxl_device.h mem/cxl-type3: Add sn option to provide serial number for PCI ecap 2022-10-09 16:38:45 -04:00
cxl_host.h pci/pci_expander_bridge: For CXL HB delay the HB register memory region setup. 2022-06-09 19:32:49 -04:00
cxl_pci.h hw/cxl/device: Add a memory device (8.2.8.5) 2022-05-13 06:13:36 -04:00