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https://gitlab.com/qemu-project/qemu
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cc9577cfb7
Signed-off-by: cmchao <cmchao@gmail.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
112 lines
3.3 KiB
C
112 lines
3.3 KiB
C
/*
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* TI OMAP TEST-Chip-level TAP emulation.
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*
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* Copyright (C) 2007-2008 Nokia Corporation
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* Written by Andrzej Zaborowski <andrew@openedhand.com>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 or
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* (at your option) any later version of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, see <http://www.gnu.org/licenses/>.
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*/
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#include "hw.h"
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#include "omap.h"
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/* TEST-Chip-level TAP */
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static uint32_t omap_tap_read(void *opaque, target_phys_addr_t addr)
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{
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struct omap_mpu_state_s *s = (struct omap_mpu_state_s *) opaque;
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switch (addr) {
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case 0x204: /* IDCODE_reg */
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switch (s->mpu_model) {
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case omap2420:
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case omap2422:
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case omap2423:
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return 0x5b5d902f; /* ES 2.2 */
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case omap2430:
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return 0x5b68a02f; /* ES 2.2 */
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case omap3430:
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return 0x1b7ae02f; /* ES 2 */
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default:
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hw_error("%s: Bad mpu model\n", __FUNCTION__);
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}
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case 0x208: /* PRODUCTION_ID_reg for OMAP2 */
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case 0x210: /* PRODUCTION_ID_reg for OMAP3 */
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switch (s->mpu_model) {
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case omap2420:
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return 0x000254f0; /* POP ESHS2.1.1 in N91/93/95, ES2 in N800 */
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case omap2422:
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return 0x000400f0;
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case omap2423:
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return 0x000800f0;
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case omap2430:
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return 0x000000f0;
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case omap3430:
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return 0x000000f0;
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default:
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hw_error("%s: Bad mpu model\n", __FUNCTION__);
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}
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case 0x20c:
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switch (s->mpu_model) {
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case omap2420:
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case omap2422:
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case omap2423:
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return 0xcafeb5d9; /* ES 2.2 */
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case omap2430:
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return 0xcafeb68a; /* ES 2.2 */
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case omap3430:
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return 0xcafeb7ae; /* ES 2 */
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default:
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hw_error("%s: Bad mpu model\n", __FUNCTION__);
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}
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case 0x218: /* DIE_ID_reg */
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return ('Q' << 24) | ('E' << 16) | ('M' << 8) | ('U' << 0);
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case 0x21c: /* DIE_ID_reg */
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return 0x54 << 24;
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case 0x220: /* DIE_ID_reg */
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return ('Q' << 24) | ('E' << 16) | ('M' << 8) | ('U' << 0);
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case 0x224: /* DIE_ID_reg */
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return ('Q' << 24) | ('E' << 16) | ('M' << 8) | ('U' << 0);
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}
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OMAP_BAD_REG(addr);
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return 0;
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}
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static void omap_tap_write(void *opaque, target_phys_addr_t addr,
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uint32_t value)
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{
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OMAP_BAD_REG(addr);
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}
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static CPUReadMemoryFunc * const omap_tap_readfn[] = {
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omap_badwidth_read32,
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omap_badwidth_read32,
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omap_tap_read,
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};
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static CPUWriteMemoryFunc * const omap_tap_writefn[] = {
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omap_badwidth_write32,
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omap_badwidth_write32,
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omap_tap_write,
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};
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void omap_tap_init(struct omap_target_agent_s *ta,
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struct omap_mpu_state_s *mpu)
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{
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omap_l4_attach(ta, 0, l4_register_io_memory(
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omap_tap_readfn, omap_tap_writefn, mpu));
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}
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