qemu/target/arm/cpu-param.h
Richard Henderson 452ef8cb8c target/arm: Add mmu_idx for EL1 and EL2 w/ PAN enabled
To implement PAN, we will want to swap, for short periods
of time, to a different privileged mmu_idx.  In addition,
we cannot do this with flushing alone, because the AT*
instructions have both PAN and PAN-less versions.

Add the ARMMMUIdx*_PAN constants where necessary next to
the corresponding ARMMMUIdx* constant.

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20200208125816.14954-3-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-02-13 14:14:53 +00:00

35 lines
720 B
C

/*
* ARM cpu parameters for qemu.
*
* Copyright (c) 2003 Fabrice Bellard
* SPDX-License-Identifier: LGPL-2.0+
*/
#ifndef ARM_CPU_PARAM_H
#define ARM_CPU_PARAM_H 1
#ifdef TARGET_AARCH64
# define TARGET_LONG_BITS 64
# define TARGET_PHYS_ADDR_SPACE_BITS 48
# define TARGET_VIRT_ADDR_SPACE_BITS 48
#else
# define TARGET_LONG_BITS 32
# define TARGET_PHYS_ADDR_SPACE_BITS 40
# define TARGET_VIRT_ADDR_SPACE_BITS 32
#endif
#ifdef CONFIG_USER_ONLY
#define TARGET_PAGE_BITS 12
#else
/*
* ARMv7 and later CPUs have 4K pages minimum, but ARMv5 and v6
* have to support 1K tiny pages.
*/
# define TARGET_PAGE_BITS_VARY
# define TARGET_PAGE_BITS_MIN 10
#endif
#define NB_MMU_MODES 12
#endif