qemu/fpu
Richard Henderson 42636fb923 softfloat: Add float64r32 arithmetic routines
These variants take a float64 as input, compute the result to
infinite precision (as we do with FloatParts), round the result
to the precision and dynamic range of float32, and then return
the result in the format of float64.

This is the operation PowerPC requires for its float32 operations.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20211119160502.17432-28-richard.henderson@linaro.org>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
2021-12-17 17:57:15 +01:00
..
meson.build
softfloat-parts-addsub.c.inc
softfloat-parts.c.inc softfloat: Add flag specific to signaling nans 2021-12-17 17:57:14 +01:00
softfloat-specialize.c.inc softfloat: Add flag specific to Inf * 0 2021-12-17 17:57:14 +01:00
softfloat.c softfloat: Add float64r32 arithmetic routines 2021-12-17 17:57:15 +01:00