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d53ead7206
We currently don't clear the interrupts if they are disabled. This means that if an interrupt occurs and the guest disables interrupts the QEMU IRQ will remain high. This doesn't immediately affect guests, but if the guest re-enables interrupts it's possible that we will miss an interrupt as it always remains set. Let's update the logic to always call qemu_set_irq() even if the interrupts are disabled to ensure we set the level low. The level will never be high unless interrupts are enabled, so we won't generate interrupts when we shouldn't. Signed-off-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Message-ID: <20231102003424.2003428-2-alistair.francis@wdc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com> |
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| .. | ||
| aspeed_smc.c | ||
| ibex_spi_host.c | ||
| imx_spi.c | ||
| Kconfig | ||
| meson.build | ||
| mss-spi.c | ||
| npcm7xx_fiu.c | ||
| npcm_pspi.c | ||
| omap_spi.c | ||
| pl022.c | ||
| sifive_spi.c | ||
| ssi.c | ||
| stm32f2xx_spi.c | ||
| trace-events | ||
| trace.h | ||
| xilinx_spi.c | ||
| xilinx_spips.c | ||
| xlnx-versal-ospi.c | ||