qemu/qapi/machine.json
Liu Jingqi c412a48d4d numa: Extend CLI to provide memory side cache information
Add -numa hmat-cache option to provide Memory Side Cache Information.
These memory attributes help to build Memory Side Cache Information
Structure(s) in ACPI Heterogeneous Memory Attribute Table (HMAT).
Before using hmat-cache option, enable HMAT with -machine hmat=on.

Acked-by: Markus Armbruster <armbru@redhat.com>
Signed-off-by: Liu Jingqi <jingqi.liu@intel.com>
Signed-off-by: Tao Xu <tao3.xu@intel.com>
Message-Id: <20191213011929.2520-4-tao3.xu@intel.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Reviewed-by: Igor Mammedov <imammedo@redhat.com>
2020-01-05 07:03:03 -05:00

930 lines
23 KiB
Python

# -*- Mode: Python -*-
#
# This work is licensed under the terms of the GNU GPL, version 2 or later.
# See the COPYING file in the top-level directory.
##
# = Machines
##
##
# @SysEmuTarget:
#
# The comprehensive enumeration of QEMU system emulation ("softmmu")
# targets. Run "./configure --help" in the project root directory, and
# look for the *-softmmu targets near the "--target-list" option. The
# individual target constants are not documented here, for the time
# being.
#
# Notes: The resulting QMP strings can be appended to the "qemu-system-"
# prefix to produce the corresponding QEMU executable name. This
# is true even for "qemu-system-x86_64".
#
# ppcemb: dropped in 3.1
#
# Since: 3.0
##
{ 'enum' : 'SysEmuTarget',
'data' : [ 'aarch64', 'alpha', 'arm', 'cris', 'hppa', 'i386', 'lm32',
'm68k', 'microblaze', 'microblazeel', 'mips', 'mips64',
'mips64el', 'mipsel', 'moxie', 'nios2', 'or1k', 'ppc',
'ppc64', 'riscv32', 'riscv64', 's390x', 'sh4',
'sh4eb', 'sparc', 'sparc64', 'tricore', 'unicore32',
'x86_64', 'xtensa', 'xtensaeb' ] }
##
# @CpuInfoArch:
#
# An enumeration of cpu types that enable additional information during
# @query-cpus and @query-cpus-fast.
#
# @s390: since 2.12
#
# @riscv: since 2.12
#
# Since: 2.6
##
{ 'enum': 'CpuInfoArch',
'data': ['x86', 'sparc', 'ppc', 'mips', 'tricore', 's390', 'riscv', 'other' ] }
##
# @CpuInfo:
#
# Information about a virtual CPU
#
# @CPU: the index of the virtual CPU
#
# @current: this only exists for backwards compatibility and should be ignored
#
# @halted: true if the virtual CPU is in the halt state. Halt usually refers
# to a processor specific low power mode.
#
# @qom_path: path to the CPU object in the QOM tree (since 2.4)
#
# @thread_id: ID of the underlying host thread
#
# @props: properties describing to which node/socket/core/thread
# virtual CPU belongs to, provided if supported by board (since 2.10)
#
# @arch: architecture of the cpu, which determines which additional fields
# will be listed (since 2.6)
#
# Since: 0.14.0
#
# Notes: @halted is a transient state that changes frequently. By the time the
# data is sent to the client, the guest may no longer be halted.
##
{ 'union': 'CpuInfo',
'base': {'CPU': 'int', 'current': 'bool', 'halted': 'bool',
'qom_path': 'str', 'thread_id': 'int',
'*props': 'CpuInstanceProperties', 'arch': 'CpuInfoArch' },
'discriminator': 'arch',
'data': { 'x86': 'CpuInfoX86',
'sparc': 'CpuInfoSPARC',
'ppc': 'CpuInfoPPC',
'mips': 'CpuInfoMIPS',
'tricore': 'CpuInfoTricore',
's390': 'CpuInfoS390',
'riscv': 'CpuInfoRISCV' } }
##
# @CpuInfoX86:
#
# Additional information about a virtual i386 or x86_64 CPU
#
# @pc: the 64-bit instruction pointer
#
# Since: 2.6
##
{ 'struct': 'CpuInfoX86', 'data': { 'pc': 'int' } }
##
# @CpuInfoSPARC:
#
# Additional information about a virtual SPARC CPU
#
# @pc: the PC component of the instruction pointer
#
# @npc: the NPC component of the instruction pointer
#
# Since: 2.6
##
{ 'struct': 'CpuInfoSPARC', 'data': { 'pc': 'int', 'npc': 'int' } }
##
# @CpuInfoPPC:
#
# Additional information about a virtual PPC CPU
#
# @nip: the instruction pointer
#
# Since: 2.6
##
{ 'struct': 'CpuInfoPPC', 'data': { 'nip': 'int' } }
##
# @CpuInfoMIPS:
#
# Additional information about a virtual MIPS CPU
#
# @PC: the instruction pointer
#
# Since: 2.6
##
{ 'struct': 'CpuInfoMIPS', 'data': { 'PC': 'int' } }
##
# @CpuInfoTricore:
#
# Additional information about a virtual Tricore CPU
#
# @PC: the instruction pointer
#
# Since: 2.6
##
{ 'struct': 'CpuInfoTricore', 'data': { 'PC': 'int' } }
##
# @CpuInfoRISCV:
#
# Additional information about a virtual RISCV CPU
#
# @pc: the instruction pointer
#
# Since 2.12
##
{ 'struct': 'CpuInfoRISCV', 'data': { 'pc': 'int' } }
##
# @CpuS390State:
#
# An enumeration of cpu states that can be assumed by a virtual
# S390 CPU
#
# Since: 2.12
##
{ 'enum': 'CpuS390State',
'prefix': 'S390_CPU_STATE',
'data': [ 'uninitialized', 'stopped', 'check-stop', 'operating', 'load' ] }
##
# @CpuInfoS390:
#
# Additional information about a virtual S390 CPU
#
# @cpu-state: the virtual CPU's state
#
# Since: 2.12
##
{ 'struct': 'CpuInfoS390', 'data': { 'cpu-state': 'CpuS390State' } }
##
# @query-cpus:
#
# Returns a list of information about each virtual CPU.
#
# This command causes vCPU threads to exit to userspace, which causes
# a small interruption to guest CPU execution. This will have a negative
# impact on realtime guests and other latency sensitive guest workloads.
# It is recommended to use @query-cpus-fast instead of this command to
# avoid the vCPU interruption.
#
# Returns: a list of @CpuInfo for each virtual CPU
#
# Since: 0.14.0
#
# Example:
#
# -> { "execute": "query-cpus" }
# <- { "return": [
# {
# "CPU":0,
# "current":true,
# "halted":false,
# "qom_path":"/machine/unattached/device[0]",
# "arch":"x86",
# "pc":3227107138,
# "thread_id":3134
# },
# {
# "CPU":1,
# "current":false,
# "halted":true,
# "qom_path":"/machine/unattached/device[2]",
# "arch":"x86",
# "pc":7108165,
# "thread_id":3135
# }
# ]
# }
#
# Notes: This interface is deprecated (since 2.12.0), and it is strongly
# recommended that you avoid using it. Use @query-cpus-fast to
# obtain information about virtual CPUs.
#
##
{ 'command': 'query-cpus', 'returns': ['CpuInfo'] }
##
# @CpuInfoFast:
#
# Information about a virtual CPU
#
# @cpu-index: index of the virtual CPU
#
# @qom-path: path to the CPU object in the QOM tree
#
# @thread-id: ID of the underlying host thread
#
# @props: properties describing to which node/socket/core/thread
# virtual CPU belongs to, provided if supported by board
#
# @arch: base architecture of the cpu; deprecated since 3.0.0 in favor
# of @target
#
# @target: the QEMU system emulation target, which determines which
# additional fields will be listed (since 3.0)
#
# Since: 2.12
#
##
{ 'union' : 'CpuInfoFast',
'base' : { 'cpu-index' : 'int',
'qom-path' : 'str',
'thread-id' : 'int',
'*props' : 'CpuInstanceProperties',
'arch' : 'CpuInfoArch',
'target' : 'SysEmuTarget' },
'discriminator' : 'target',
'data' : { 's390x' : 'CpuInfoS390' } }
##
# @query-cpus-fast:
#
# Returns information about all virtual CPUs. This command does not
# incur a performance penalty and should be used in production
# instead of query-cpus.
#
# Returns: list of @CpuInfoFast
#
# Since: 2.12
#
# Example:
#
# -> { "execute": "query-cpus-fast" }
# <- { "return": [
# {
# "thread-id": 25627,
# "props": {
# "core-id": 0,
# "thread-id": 0,
# "socket-id": 0
# },
# "qom-path": "/machine/unattached/device[0]",
# "arch":"x86",
# "target":"x86_64",
# "cpu-index": 0
# },
# {
# "thread-id": 25628,
# "props": {
# "core-id": 0,
# "thread-id": 0,
# "socket-id": 1
# },
# "qom-path": "/machine/unattached/device[2]",
# "arch":"x86",
# "target":"x86_64",
# "cpu-index": 1
# }
# ]
# }
##
{ 'command': 'query-cpus-fast', 'returns': [ 'CpuInfoFast' ] }
##
# @cpu-add:
#
# Adds CPU with specified ID.
#
# @id: ID of CPU to be created, valid values [0..max_cpus)
#
# Returns: Nothing on success
#
# Since: 1.5
#
# Note: This command is deprecated. The `device_add` command should be
# used instead. See the `query-hotpluggable-cpus` command for
# details.
#
# Example:
#
# -> { "execute": "cpu-add", "arguments": { "id": 2 } }
# <- { "return": {} }
#
##
{ 'command': 'cpu-add', 'data': {'id': 'int'} }
##
# @MachineInfo:
#
# Information describing a machine.
#
# @name: the name of the machine
#
# @alias: an alias for the machine name
#
# @is-default: whether the machine is default
#
# @cpu-max: maximum number of CPUs supported by the machine type
# (since 1.5.0)
#
# @hotpluggable-cpus: cpu hotplug via -device is supported (since 2.7.0)
#
# @numa-mem-supported: true if '-numa node,mem' option is supported by
# the machine type and false otherwise (since 4.1)
#
# @deprecated: if true, the machine type is deprecated and may be removed
# in future versions of QEMU according to the QEMU deprecation
# policy (since 4.1.0)
#
# @default-cpu-type: default CPU model typename if none is requested via
# the -cpu argument. (since 4.2)
#
# Since: 1.2.0
##
{ 'struct': 'MachineInfo',
'data': { 'name': 'str', '*alias': 'str',
'*is-default': 'bool', 'cpu-max': 'int',
'hotpluggable-cpus': 'bool', 'numa-mem-supported': 'bool',
'deprecated': 'bool', '*default-cpu-type': 'str' } }
##
# @query-machines:
#
# Return a list of supported machines
#
# Returns: a list of MachineInfo
#
# Since: 1.2.0
##
{ 'command': 'query-machines', 'returns': ['MachineInfo'] }
##
# @CurrentMachineParams:
#
# Information describing the running machine parameters.
#
# @wakeup-suspend-support: true if the machine supports wake up from
# suspend
#
# Since: 4.0
##
{ 'struct': 'CurrentMachineParams',
'data': { 'wakeup-suspend-support': 'bool'} }
##
# @query-current-machine:
#
# Return information on the current virtual machine.
#
# Returns: CurrentMachineParams
#
# Since: 4.0
##
{ 'command': 'query-current-machine', 'returns': 'CurrentMachineParams' }
##
# @TargetInfo:
#
# Information describing the QEMU target.
#
# @arch: the target architecture
#
# Since: 1.2.0
##
{ 'struct': 'TargetInfo',
'data': { 'arch': 'SysEmuTarget' } }
##
# @query-target:
#
# Return information about the target for this QEMU
#
# Returns: TargetInfo
#
# Since: 1.2.0
##
{ 'command': 'query-target', 'returns': 'TargetInfo' }
##
# @NumaOptionsType:
#
# @node: NUMA nodes configuration
#
# @dist: NUMA distance configuration (since 2.10)
#
# @cpu: property based CPU(s) to node mapping (Since: 2.10)
#
# @hmat-lb: memory latency and bandwidth information (Since: 5.0)
#
# @hmat-cache: memory side cache information (Since: 5.0)
#
# Since: 2.1
##
{ 'enum': 'NumaOptionsType',
'data': [ 'node', 'dist', 'cpu', 'hmat-lb', 'hmat-cache' ] }
##
# @NumaOptions:
#
# A discriminated record of NUMA options. (for OptsVisitor)
#
# Since: 2.1
##
{ 'union': 'NumaOptions',
'base': { 'type': 'NumaOptionsType' },
'discriminator': 'type',
'data': {
'node': 'NumaNodeOptions',
'dist': 'NumaDistOptions',
'cpu': 'NumaCpuOptions',
'hmat-lb': 'NumaHmatLBOptions',
'hmat-cache': 'NumaHmatCacheOptions' }}
##
# @NumaNodeOptions:
#
# Create a guest NUMA node. (for OptsVisitor)
#
# @nodeid: NUMA node ID (increase by 1 from 0 if omitted)
#
# @cpus: VCPUs belonging to this node (assign VCPUS round-robin
# if omitted)
#
# @mem: memory size of this node; mutually exclusive with @memdev.
# Equally divide total memory among nodes if both @mem and @memdev are
# omitted.
#
# @memdev: memory backend object. If specified for one node,
# it must be specified for all nodes.
#
# @initiator: defined in ACPI 6.3 Chapter 5.2.27.3 Table 5-145,
# points to the nodeid which has the memory controller
# responsible for this NUMA node. This field provides
# additional information as to the initiator node that
# is closest (as in directly attached) to this node, and
# therefore has the best performance (since 5.0)
#
# Since: 2.1
##
{ 'struct': 'NumaNodeOptions',
'data': {
'*nodeid': 'uint16',
'*cpus': ['uint16'],
'*mem': 'size',
'*memdev': 'str',
'*initiator': 'uint16' }}
##
# @NumaDistOptions:
#
# Set the distance between 2 NUMA nodes.
#
# @src: source NUMA node.
#
# @dst: destination NUMA node.
#
# @val: NUMA distance from source node to destination node.
# When a node is unreachable from another node, set the distance
# between them to 255.
#
# Since: 2.10
##
{ 'struct': 'NumaDistOptions',
'data': {
'src': 'uint16',
'dst': 'uint16',
'val': 'uint8' }}
##
# @X86CPURegister32:
#
# A X86 32-bit register
#
# Since: 1.5
##
{ 'enum': 'X86CPURegister32',
'data': [ 'EAX', 'EBX', 'ECX', 'EDX', 'ESP', 'EBP', 'ESI', 'EDI' ] }
##
# @X86CPUFeatureWordInfo:
#
# Information about a X86 CPU feature word
#
# @cpuid-input-eax: Input EAX value for CPUID instruction for that feature word
#
# @cpuid-input-ecx: Input ECX value for CPUID instruction for that
# feature word
#
# @cpuid-register: Output register containing the feature bits
#
# @features: value of output register, containing the feature bits
#
# Since: 1.5
##
{ 'struct': 'X86CPUFeatureWordInfo',
'data': { 'cpuid-input-eax': 'int',
'*cpuid-input-ecx': 'int',
'cpuid-register': 'X86CPURegister32',
'features': 'int' } }
##
# @DummyForceArrays:
#
# Not used by QMP; hack to let us use X86CPUFeatureWordInfoList internally
#
# Since: 2.5
##
{ 'struct': 'DummyForceArrays',
'data': { 'unused': ['X86CPUFeatureWordInfo'] } }
##
# @NumaCpuOptions:
#
# Option "-numa cpu" overrides default cpu to node mapping.
# It accepts the same set of cpu properties as returned by
# query-hotpluggable-cpus[].props, where node-id could be used to
# override default node mapping.
#
# Since: 2.10
##
{ 'struct': 'NumaCpuOptions',
'base': 'CpuInstanceProperties',
'data' : {} }
##
# @HmatLBMemoryHierarchy:
#
# The memory hierarchy in the System Locality Latency and Bandwidth
# Information Structure of HMAT (Heterogeneous Memory Attribute Table)
#
# For more information about @HmatLBMemoryHierarchy, see chapter
# 5.2.27.4: Table 5-146: Field "Flags" of ACPI 6.3 spec.
#
# @memory: the structure represents the memory performance
#
# @first-level: first level of memory side cache
#
# @second-level: second level of memory side cache
#
# @third-level: third level of memory side cache
#
# Since: 5.0
##
{ 'enum': 'HmatLBMemoryHierarchy',
'data': [ 'memory', 'first-level', 'second-level', 'third-level' ] }
##
# @HmatLBDataType:
#
# Data type in the System Locality Latency and Bandwidth
# Information Structure of HMAT (Heterogeneous Memory Attribute Table)
#
# For more information about @HmatLBDataType, see chapter
# 5.2.27.4: Table 5-146: Field "Data Type" of ACPI 6.3 spec.
#
# @access-latency: access latency (nanoseconds)
#
# @read-latency: read latency (nanoseconds)
#
# @write-latency: write latency (nanoseconds)
#
# @access-bandwidth: access bandwidth (Bytes per second)
#
# @read-bandwidth: read bandwidth (Bytes per second)
#
# @write-bandwidth: write bandwidth (Bytes per second)
#
# Since: 5.0
##
{ 'enum': 'HmatLBDataType',
'data': [ 'access-latency', 'read-latency', 'write-latency',
'access-bandwidth', 'read-bandwidth', 'write-bandwidth' ] }
##
# @NumaHmatLBOptions:
#
# Set the system locality latency and bandwidth information
# between Initiator and Target proximity Domains.
#
# For more information about @NumaHmatLBOptions, see chapter
# 5.2.27.4: Table 5-146 of ACPI 6.3 spec.
#
# @initiator: the Initiator Proximity Domain.
#
# @target: the Target Proximity Domain.
#
# @hierarchy: the Memory Hierarchy. Indicates the performance
# of memory or side cache.
#
# @data-type: presents the type of data, access/read/write
# latency or hit latency.
#
# @latency: the value of latency from @initiator to @target
# proximity domain, the latency unit is "ns(nanosecond)".
#
# @bandwidth: the value of bandwidth between @initiator and @target
# proximity domain, the bandwidth unit is
# "Bytes per second".
#
# Since: 5.0
##
{ 'struct': 'NumaHmatLBOptions',
'data': {
'initiator': 'uint16',
'target': 'uint16',
'hierarchy': 'HmatLBMemoryHierarchy',
'data-type': 'HmatLBDataType',
'*latency': 'uint64',
'*bandwidth': 'size' }}
##
# @HmatCacheAssociativity:
#
# Cache associativity in the Memory Side Cache Information Structure
# of HMAT
#
# For more information of @HmatCacheAssociativity, see chapter
# 5.2.27.5: Table 5-147 of ACPI 6.3 spec.
#
# @none: None (no memory side cache in this proximity domain,
# or cache associativity unknown)
#
# @direct: Direct Mapped
#
# @complex: Complex Cache Indexing (implementation specific)
#
# Since: 5.0
##
{ 'enum': 'HmatCacheAssociativity',
'data': [ 'none', 'direct', 'complex' ] }
##
# @HmatCacheWritePolicy:
#
# Cache write policy in the Memory Side Cache Information Structure
# of HMAT
#
# For more information of @HmatCacheWritePolicy, see chapter
# 5.2.27.5: Table 5-147: Field "Cache Attributes" of ACPI 6.3 spec.
#
# @none: None (no memory side cache in this proximity domain,
# or cache write policy unknown)
#
# @write-back: Write Back (WB)
#
# @write-through: Write Through (WT)
#
# Since: 5.0
##
{ 'enum': 'HmatCacheWritePolicy',
'data': [ 'none', 'write-back', 'write-through' ] }
##
# @NumaHmatCacheOptions:
#
# Set the memory side cache information for a given memory domain.
#
# For more information of @NumaHmatCacheOptions, see chapter
# 5.2.27.5: Table 5-147: Field "Cache Attributes" of ACPI 6.3 spec.
#
# @node-id: the memory proximity domain to which the memory belongs.
#
# @size: the size of memory side cache in bytes.
#
# @level: the cache level described in this structure.
#
# @associativity: the cache associativity,
# none/direct-mapped/complex(complex cache indexing).
#
# @policy: the write policy, none/write-back/write-through.
#
# @line: the cache Line size in bytes.
#
# Since: 5.0
##
{ 'struct': 'NumaHmatCacheOptions',
'data': {
'node-id': 'uint32',
'size': 'size',
'level': 'uint8',
'associativity': 'HmatCacheAssociativity',
'policy': 'HmatCacheWritePolicy',
'line': 'uint16' }}
##
# @HostMemPolicy:
#
# Host memory policy types
#
# @default: restore default policy, remove any nondefault policy
#
# @preferred: set the preferred host nodes for allocation
#
# @bind: a strict policy that restricts memory allocation to the
# host nodes specified
#
# @interleave: memory allocations are interleaved across the set
# of host nodes specified
#
# Since: 2.1
##
{ 'enum': 'HostMemPolicy',
'data': [ 'default', 'preferred', 'bind', 'interleave' ] }
##
# @Memdev:
#
# Information about memory backend
#
# @id: backend's ID if backend has 'id' property (since 2.9)
#
# @size: memory backend size
#
# @merge: enables or disables memory merge support
#
# @dump: includes memory backend's memory in a core dump or not
#
# @prealloc: enables or disables memory preallocation
#
# @host-nodes: host nodes for its memory policy
#
# @policy: memory policy of memory backend
#
# Since: 2.1
##
{ 'struct': 'Memdev',
'data': {
'*id': 'str',
'size': 'size',
'merge': 'bool',
'dump': 'bool',
'prealloc': 'bool',
'host-nodes': ['uint16'],
'policy': 'HostMemPolicy' }}
##
# @query-memdev:
#
# Returns information for all memory backends.
#
# Returns: a list of @Memdev.
#
# Since: 2.1
#
# Example:
#
# -> { "execute": "query-memdev" }
# <- { "return": [
# {
# "id": "mem1",
# "size": 536870912,
# "merge": false,
# "dump": true,
# "prealloc": false,
# "host-nodes": [0, 1],
# "policy": "bind"
# },
# {
# "size": 536870912,
# "merge": false,
# "dump": true,
# "prealloc": true,
# "host-nodes": [2, 3],
# "policy": "preferred"
# }
# ]
# }
#
##
{ 'command': 'query-memdev', 'returns': ['Memdev'], 'allow-preconfig': true }
##
# @CpuInstanceProperties:
#
# List of properties to be used for hotplugging a CPU instance,
# it should be passed by management with device_add command when
# a CPU is being hotplugged.
#
# @node-id: NUMA node ID the CPU belongs to
# @socket-id: socket number within node/board the CPU belongs to
# @die-id: die number within node/board the CPU belongs to (Since 4.1)
# @core-id: core number within die the CPU belongs to# @thread-id: thread number within core the CPU belongs to
#
# Note: currently there are 5 properties that could be present
# but management should be prepared to pass through other
# properties with device_add command to allow for future
# interface extension. This also requires the filed names to be kept in
# sync with the properties passed to -device/device_add.
#
# Since: 2.7
##
{ 'struct': 'CpuInstanceProperties',
'data': { '*node-id': 'int',
'*socket-id': 'int',
'*die-id': 'int',
'*core-id': 'int',
'*thread-id': 'int'
}
}
##
# @HotpluggableCPU:
#
# @type: CPU object type for usage with device_add command
# @props: list of properties to be used for hotplugging CPU
# @vcpus-count: number of logical VCPU threads @HotpluggableCPU provides
# @qom-path: link to existing CPU object if CPU is present or
# omitted if CPU is not present.
#
# Since: 2.7
##
{ 'struct': 'HotpluggableCPU',
'data': { 'type': 'str',
'vcpus-count': 'int',
'props': 'CpuInstanceProperties',
'*qom-path': 'str'
}
}
##
# @query-hotpluggable-cpus:
#
# TODO: Better documentation; currently there is none.
#
# Returns: a list of HotpluggableCPU objects.
#
# Since: 2.7
#
# Example:
#
# For pseries machine type started with -smp 2,cores=2,maxcpus=4 -cpu POWER8:
#
# -> { "execute": "query-hotpluggable-cpus" }
# <- {"return": [
# { "props": { "core": 8 }, "type": "POWER8-spapr-cpu-core",
# "vcpus-count": 1 },
# { "props": { "core": 0 }, "type": "POWER8-spapr-cpu-core",
# "vcpus-count": 1, "qom-path": "/machine/unattached/device[0]"}
# ]}'
#
# For pc machine type started with -smp 1,maxcpus=2:
#
# -> { "execute": "query-hotpluggable-cpus" }
# <- {"return": [
# {
# "type": "qemu64-x86_64-cpu", "vcpus-count": 1,
# "props": {"core-id": 0, "socket-id": 1, "thread-id": 0}
# },
# {
# "qom-path": "/machine/unattached/device[0]",
# "type": "qemu64-x86_64-cpu", "vcpus-count": 1,
# "props": {"core-id": 0, "socket-id": 0, "thread-id": 0}
# }
# ]}
#
# For s390x-virtio-ccw machine type started with -smp 1,maxcpus=2 -cpu qemu
# (Since: 2.11):
#
# -> { "execute": "query-hotpluggable-cpus" }
# <- {"return": [
# {
# "type": "qemu-s390x-cpu", "vcpus-count": 1,
# "props": { "core-id": 1 }
# },
# {
# "qom-path": "/machine/unattached/device[0]",
# "type": "qemu-s390x-cpu", "vcpus-count": 1,
# "props": { "core-id": 0 }
# }
# ]}
#
##
{ 'command': 'query-hotpluggable-cpus', 'returns': ['HotpluggableCPU'],
'allow-preconfig': true }
##
# @set-numa-node:
#
# Runtime equivalent of '-numa' CLI option, available at
# preconfigure stage to configure numa mapping before initializing
# machine.
#
# Since 3.0
##
{ 'command': 'set-numa-node', 'boxed': true,
'data': 'NumaOptions',
'allow-preconfig': true
}