qemu/target-xtensa
Peter Maydell 2472b6c07b gdbstub: Allow target CPUs to specify watchpoint STOP_BEFORE_ACCESS flag
GDB assumes that watchpoint set via the gdbstub remote protocol will
behave in the same way as hardware watchpoints for the target. In
particular, whether the CPU stops with the PC before or after the insn
which triggers the watchpoint is target dependent. Allow guest CPU
code to specify which behaviour to use. This fixes a bug where with
guest CPUs which stop before the accessing insn GDB would manually
step forward over what it thought was the insn and end up one insn
further forward than it should be.

We set this flag for the CPU architectures which set
gdbarch_have_nonsteppable_watchpoint in gdb 7.7:
ARM, CRIS, LM32, MIPS and Xtensa.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Tested-by: Max Filippov <jcmvbkbc@gmail.com>
Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Tested-by: Michael Walle <michael@walle.cc> (for lm32)
Message-id: 1410545057-14014-1-git-send-email-peter.maydell@linaro.org
2014-10-06 14:25:43 +01:00
..
core-dc232b target-xtensa: add dc232b core 2011-10-16 10:40:02 +00:00
core-dc233c target-xtensa: add dc233c core 2012-04-15 17:43:16 +00:00
core-fsf target-xtensa: add fsf core 2011-10-16 10:40:16 +00:00
core-dc232b.c target-xtensa: refactor standard core configuration 2014-02-24 04:47:02 +04:00
core-dc233c.c target-xtensa: refactor standard core configuration 2014-02-24 04:47:02 +04:00
core-fsf.c target-xtensa: refactor standard core configuration 2014-02-24 04:47:02 +04:00
cpu-qom.h target-xtensa: Use cpu_exec_interrupt qom hook 2014-09-25 18:54:21 +01:00
cpu.c gdbstub: Allow target CPUs to specify watchpoint STOP_BEFORE_ACCESS flag 2014-10-06 14:25:43 +01:00
cpu.h cpu-exec: Make debug_excp_handler a QOM CPU method 2014-09-12 14:06:48 +01:00
gdbstub.c cpu: Introduce CPUClass::gdb_{read,write}_register() 2013-07-27 00:04:17 +02:00
helper.c target-xtensa: Use cpu_exec_interrupt qom hook 2014-09-25 18:54:21 +01:00
helper.h tcg: Invert the inclusion of helper.h 2014-05-28 09:33:54 -07:00
Makefile.objs cpu: Introduce CPUClass::gdb_{read,write}_register() 2013-07-27 00:04:17 +02:00
op_helper.c softmmu: introduce cpu_ldst.h 2014-06-05 16:10:33 +02:00
overlay_tool.h target-xtensa: provide HW confg ID registers 2014-02-24 04:47:02 +04:00
translate.c trace: [tcg] Include TCG-tracing header on all targets 2014-08-12 14:26:12 +01:00
xtensa-semi.c tcg: Invert the inclusion of helper.h 2014-05-28 09:33:54 -07:00